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首页> 外文期刊>Chinese Journal of Electronics >A Fully-Integrated Low-Power Analog Front-End for ZigBee Transmitter Applications
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A Fully-Integrated Low-Power Analog Front-End for ZigBee Transmitter Applications

机译：适用于ZigBee发射器应用的全集成式低功耗模拟前端

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摘要

A low-power high-linearity Analog frontend (AFE) composed by a Digital-to-analog converter (DAC) and a Low-pass filter (LPF) is proposed in this paper for ZigBee transmitter applications. The DAC is realized by current-steering topology which adopts an optimized segmentation method to resolve the contradiction between requirements of linearity and power. A Successive approximation register (SAR) frequency auto-tuning operation is presented for the LPF to accommodate the performance deterioration due to the Process, voltage and temperature (PVT) variations. Implemented in a 0.13μm CMOS technology, the proposed AFE has been fully integrated in a ZigBee transceiver chip with an area of 0.23mm2. The experimental results demonstrate that it achieves a linearity of 30dBm Output 3rd order intercept point (OIP3) and dissipates 4.75mA from a 1.2V supply.
机译：本文针对ZigBee发射器应用，提出了一种由数模转换器（DAC）和低通滤波器（LPF）组成的低功耗高线性度模拟前端（AFE）。 DAC是通过电流控制拓扑实现的，电流拓扑采用一种优化的分段方法来解决线性和功率要求之间的矛盾。针对LPF提出了逐次逼近寄存器（SAR）频率自动调谐操作，以适应由于工艺，电压和温度（PVT）变化而导致的性能下降。拟议的AFE采用0.13μmCMOS技术实施，已完全集成在面积为0.23mm2的ZigBee收发器芯片中。实验结果表明，该器件实现了30dBm输出三阶截取点（OIP3）的线性度，并从1.2V电源消耗了4.75mA的电流。

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