FPGAs Provide Edge for Convolutional Neural Networks

Ted Marena; Robert Green

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FPGAs Provide Edge for Convolutional Neural Networks

机译：FPGA为卷积神经网络提供优势

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Machine learning is a techniquewidely used for analyzingand finding patterns acrossextremely large data sets asa means to "teach"—rather than programcomputers to perform complex tasks.However,traditional machine learningtechniques struggle with high-dimensionaldata such as images and video data.Thisis where deep learning using convolutionalneural networks (CNNs) come into play tooffer a more robust solution for this type ofdata across a wide range of applications andmarket segments.

机译：机器学习是一种广泛用于分析和查找非常大的数据集的模式的技术，它是“教”的一种方法，而不是程序计算机执行复杂的任务。但是，传统的机器学习技术却难以处理图像和视频数据等高维数据。使用卷积神经网络（CNN）进行深度学习，为跨各种应用和细分市场的此类数据提供了更强大的解决方案。

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《Circuit cellar》 |2018年第341期|12-1416-18|共6页
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Ted Marena; Robert Green;
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1. fpgaConvNet: Mapping Regular and Irregular Convolutional Neural Networks on FPGAs [J] . Venieris Stylianos I, Bouganis Christos-Savvas Neural Networks and Learning Systems, IEEE Transactions on . 2019,第2期

机译：fpgaConvNet：在FPGA上映射规则和不规则卷积神经网络
2. RSNN: A Software/Hardware Co-Optimized Framework for Sparse Convolutional Neural Networks on FPGAs [J] . Weijie You, Chang Wu Quality Control, Transactions . 2021,第1期

机译：RSNN：FPGA上的稀疏卷积神经网络的软件/硬件共同优化框架
3. Impact of Single-Event Upsets on Convolutional Neural Networks in Xilinx Zynq FPGAs [J] . Wang H. -B., Wang Y. -S., Xiao J. -H., IEEE Transactions on Nuclear Science . 2021,第4期

机译：单事件upsets对Xilinx Zynq FPGA卷积神经网络的影响
4. Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing [C] . Akshay Dua, Yixing Li, Fengbo Ren IEEE Annual International Symposium on Field-Programmable Custom Computing Machines . 2020

机译：Systolic-CNN：OpenCL定义的可扩展运行时灵活的FPGA加速器架构，用于加速云/边缘计算中的卷积神经网络推理
5. Caffeinated FPGAs: FPGA Framework for Training and Inference of Convolutional Neural Networks With Reduced Precision Floating-Point Arithmetic [D] . DiCecco, Roberto. 2018

机译：含咖啡因的FPGA：用于训练和推理卷积神经网络的FPGA框架，具有降低的精度浮点算法
6. CNNDLP: A Method Based on Convolutional Autoencoder and Convolutional Neural Network with Adjacent Edge Attention for Predicting lncRNA–Disease Associations [O] . Ping Xuan, Nan Sheng, Tiangang Zhang, 2019

机译：CNNDLP：一种基于卷积自动编码器和卷积神经网络并具有相邻边缘注意的预测lncRNA与疾病关联的方法
7. Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing [O] . Akshay Dua, Yixing Li, Fengbo Ren 2020

机译：Systolic-CNN：用于在云/边缘计算中加速卷积神经网络推断的OpenCL定义可伸缩的运行时柔性FPGA加速器架构

FPGAs Provide Edge for Convolutional Neural Networks

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