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首页> 外文期刊>Circuits and systems >Implementation of N-Bit Binary Multiplication Using N - 1 Bit Multiplication Based on Nikhilam Sutra and Karatsuba Principles Using Complement Method
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Implementation of N-Bit Binary Multiplication Using N - 1 Bit Multiplication Based on Nikhilam Sutra and Karatsuba Principles Using Complement Method

机译：基于Nikhilam Sutra和Karatsuba原理的N-1位乘法使用补码方法实现N位二进制乘法

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This paper is designed to introduce new hybrid Vedic algorithm to increase the speed of the multiplier. This work combines the principles of Nikhilam sutra and Karatsuba algorithm. Vedic Mathematics is the mathematical system to solve the complex computations in an easier manner. There are specific sutras to perform multiplication. Nikhilam sutra is one of the sutra. But this has some limitations. To overcome the limitations, this sutra is combined with Karatsuba algorithm. High speed devices are required for high speed applications with compact size. Normally multipliers require more power for its computation. In this paper, new multiplication algorithm for the multiplication of binary numbers is proposed based on Vedic Mathematics. The novel portion in the algorithm is found to be in the calculation of remainder using complement method. The size of the remainder is always set as N - 1 bit for any combination of input The multiplier structure is designed based on Karatsuba algorithm. Therefore, N x N bit multiplication is done by (N - 1) bit multiplication. Numerical strength reduction is done through Karatsuba algorithm. The results show that the reduction in hardware leads to reduction in the delay.
机译：本文旨在介绍新的混合吠陀算法，以提高乘法器的速度。这项工作结合了Nikhilam佛经和Karatsuba算法的原理。吠陀数学是一种数学系统，可以更轻松地解决复杂的计算问题。有特定的经文可以执行乘法。尼希兰经就是其中之一。但这有一些限制。为了克服这些限制，此经与唐津算法结合使用。尺寸紧凑的高速应用需要高速设备。通常，乘法器需要更多的计算能力。本文基于吠陀数学，提出了一种新的二进制数乘法算法。发现算法中的新颖部分在于使用补余法计算余数。对于输入的任何组合，余数的大小始终设置为N-1位。乘法器结构是基于Karatsuba算法设计的。因此，通过（N-1）位乘法来完成N×N位乘法。通过Karatsuba算法进行数值强度折减。结果表明，硬件的减少导致延迟的减少。

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