• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>Circuits and systems >Harmonic Minimization in Seven Level Cascaded Multilevel Inverter Using Selective Harmonic Elimination PWM Techniques
【24h】

Harmonic Minimization in Seven Level Cascaded Multilevel Inverter Using Selective Harmonic Elimination PWM Techniques

机译：七电平级联多电平逆变器的谐波最小化采用选择性谐波消除PWM技术

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

This paper concentrates on enhancing the productivity of the multilevel inverter and nature of yield voltage waveform. Seven level lessened switches topology has been actualized with just seven switches. Essential Switching plan and Selective Harmonics Elimination were executed to diminish the Total Harmonics Distortion (THD) esteem. Selective Harmonics Elimination Stepped Waveform (SHESW) strategy is executed to dispense with the lower order harmonics. Fundamental switching plan is utilized to control the switches in the inverter. The proposed topology is reasonable for any number of levels. The harmonic lessening is accomplished by selecting fitting switching angles. It indicates would like to decrease starting expense and unpredictability consequently it is able for modern applications. In this paper, third and fifth level harmonics have been disposed of. Simulation work is done utilizing the MATLAB/Simulink programming results have been displayed to accept the hypothesis.
机译：本文着重于提高多电平逆变器的生产率和屈服电压波形的性质。仅用七个交换机就实现了七级精简交换机拓扑。执行基本转换计划和消除选择性谐波以减少总谐波失真（THD）的估计。执行选择性谐波消除步进波形（SHESW）策略以免除低阶谐波。基本的开关计划用于控制逆变器中的开关。建议的拓扑对于任何数量的级别都是合理的。通过选择合适的开关角度可以减少谐波。它表示希望减少启动费用和不可预测性，因此可以在现代应用中使用。在本文中，已经处理了三级和五级谐波。仿真工作是利用MATLAB / Simulink编程结果完成的，已经接受了该假设。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号