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High-Performance Implementation of Dynamically Configurable Load Balancing Engine on FPGA

机译:FPGA上动态可配置负载平衡引擎的高性能实现

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摘要

Load balancing technology plays an important role in task distribution. At present, mainstream solutions are implemented by software, and the delay introduced is longer; others implemented by hardware do not achieve excellent performance. This article proposes an implementation scheme of a reconfigurable load balancing engine on an FPGA. This engine could distribute network packets to CPU cores over a five-tuple, and the delay brought by balancing algorithm is only about 26 ns. Furthermore, this engine can process all frame sizes of packets at 100 percent line rate and zero packet loss rate, achieving excellent performance. At the same time, this engine supports dynamic configuration and can be set flexibly according to different scenarios.
机译:负载平衡技术在任务分发中起着重要作用。目前,主流解决方案由软件实施,延迟引入较长;由硬件实施的其他人无法实现优异的性能。本文提出了在FPGA上的可重构负载平衡引擎的实施方案。该引擎可以通过五元组分配到CPU核心的网络数据包,并且平衡算法带来的延迟仅为26 ns。此外,该发动机可以以100%的线速率和零分组丢失率处理所有帧大小,实现优异的性能。同时,此引擎支持动态配置,可以根据不同的场景灵活地设置。

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