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首页> 外文期刊>Computers, IEEE Transactions on >Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip
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Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip

机译：基于动态可重新配置片上网络的多处理器片上系统的热感知任务映射

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摘要

Dark silicon is the phenomenon that a fraction of many-core chip has to be turned off or run in a low-power state in order to maintain the safe chip temperature. System-level thermal management techniques normally map application on non-adjacent cores, while communication efficiency among these cores will be oppositely affected over conventional network-on-chip (NoC). Recently, SMART NoC architecture is proposed, enabling single-cycle multi-hop bypass channels to be built between distant cores at runtime, to reduce communication latency. However, communication efficiency of SMART NoC will be diminished by communication contention, which will in turn decrease system performance. In this paper, we first propose an Integer-Linear Programming (ILP) model to properly address communication problem, which generates the optimal solutions with the consideration of inter-processor communication. We further present a novel heuristic algorithm for task mapping in dark silicon many-core systems, called TopoMap, on top of SMART architecture, which can effectively solve communication contention problem in polynomial time. With fine-grained consideration of chip thermal reliability and inter-processor communication, presented approaches are able to control the reconfigurability of NoC communication topology in task mapping and scheduling. Thermal-safe system is guaranteed by physically decentralized active cores, and communication overhead is reduced by the minimized communication contention and maximized bypass routing. Performance evaluation on PARSEC shows the applicability and effectiveness of the proposed techniques, which achieve on average 42.5 and 32.4 percent improvement in communication and application performance, and 32.3 percent reduction in system energy consumption, compared with state-of-the-art techniques. TopoMap only introduces 1.8 percent performance difference compared to ILP model and is more scalable to large-size NoCs.
机译：深色硅是必须关闭一部分多核芯片或使其处于低功耗状态才能维持安全芯片温度的现象。系统级热管理技术通常将应用程序映射到不相邻的内核上，而这些内核之间的通信效率将受到常规片上网络（NoC）的相反影响。最近，提出了SMART NoC架构，该架构允许在运行时在遥远的内核之间建立单周期多跳旁路通道，以减少通信延迟。但是，SMART NoC的通信效率将因通信争用而降低，从而降低系统性能。在本文中，我们首先提出一个整数线性规划（ILP）模型来正确解决通信问题，该模型在考虑处理器间通信的情况下产生最佳解决方案。在SMART架构的基础上，我们进一步提出了一种新颖的启发式算法，用于深色硅多核系统中的任务映射，称为TopoMap，可以有效解决多项式时间内的通信争用问题。通过细致地考虑芯片热可靠性和处理器间通信，提出的方法能够控制任务映射和调度中NoC通信拓扑的可重新配置性。物理上分散的有源内核可确保热安全系统，并通过最小化通信争用和最大化旁路路由来减少通信开销。 PARSEC的性能评估显示了所提出技术的适用性和有效性，与最新技术相比，它们在通信和应用性能方面平均提高了42.5％和32.4％，在系统能耗方面降低了32.3％。与ILP模型相比，TopoMap仅引入了1.8％的性能差异，并且可扩展到大型NoC。

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  • 来源
    《Computers, IEEE Transactions on》 |2018年第12期|1818-1834|共17页
  • 作者

    Weichen Liu; Lei Yang; Weiwen Jiang; Liang Feng; Nan Guan; Wei Zhang; Nikil Dutt;

  • 作者单位

    School of Computer Science and Engineering, Nanyang Technological University, Singapore;

    College of Computer Science, Chongqing University, Chongqing, China;

    College of Computer Science, Chongqing University, Chongqing, China;

    College of Computer Science, Chongqing University, Chongqing, China;

    Department of Computing, Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong;

    Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong;

    Department of Computer Science, University of California, Irvine, USA;

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  • 正文语种 eng
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  • 关键词

    Task analysis; Reconfigurable logic; Routing; Energy consumption; Thermal management;

    机译：任务分析;可重构逻辑;路由;能耗;热管理;

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