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Using Virtual Secure Circuit to Protect Embedded Software from Side-Channel Attacks

机译：使用虚拟安全电路保护嵌入式软件免受侧通道攻击

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摘要

Side-Channel Attacks (SCAs) can break a cryptographic implementation within a very short time, and therefore, has become a practical threat to embedded security. This work presents Virtual Secure Circuit (VSC) as a software countermeasure to SCA. VSC provides protection to software by emulating WDDL, an SCA-resistant hardware circuit style. VSC is algorithm independent. This enables designers to protect different cryptographic software with only one solution. This work proposes the concept of VSC together with two implementation schemes. One scheme is based on a custom-instruction single-core processor architecture and the other on a dual-core architecture. Correspondingly, we built two prototypes on FPGA systems. Experiments with real-world side-channel power and electromagnetic attacks demonstrate that, compared with the unprotected software, VSC on single-core processor provides 20 times security improvement. The experiments also show that, although VSC on dual-core processor does not thwart electromagnetic attacks, it offers more than 25 times security improvement against power attacks. We conclude that VSC is comparable in security improvement to WDDL, but is more flexible and has much lower hardware cost.
机译：侧通道攻击（SCA）可以在很短的时间内破坏加密实现，因此，已成为对嵌入式安全性的实际威胁。这项工作介绍了虚拟安全电路（VSC）作为SCA的软件对策。 VSC通过仿真WDDL（一种可抵抗SCA的硬件电路样式）为软件提供保护。 VSC与算法无关。这使设计人员仅用一种解决方案即可保护不同的密码软件。这项工作提出了VSC的概念以及两个实施方案。一种方案基于定制指令单核处理器体系结构，另一种方案基于双核体系结构。相应地，我们在FPGA系统上构建了两个原型。实际的边信道功率和电磁攻击实验表明，与不受保护的软件相比，单核处理器上的VSC可使安全性提高20倍。实验还表明，尽管双核处理器上的VSC不能阻止电磁攻击，但它对电源攻击的安全性提高了25倍以上。我们得出的结论是，VSC在安全性改进方面可与WDDL相提并论，但更加灵活并且具有更低的硬件成本。

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