A novel video signal processor with programmable data arrangement and efficient memory configuration

Yeong-Kang Lai; Liang-Gee Chen

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A novel video signal processor with programmable data arrangement and efficient memory configuration

机译：具有可编程数据排列和高效存储器配置的新型视频信号处理器

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This paper describes a novel video signal processor (VSP) with a fully pipelined parallel architecture for video browsing, coding, and image processing for multimedia systems. The efficiency of the architecture developed is increased by use of a programmable data arrangement and an intelligent memory configuration. Techniques for reducing the interconnections and external memory accesses are also presented. A configuration of random-access on-chip memory modules solves the problems of chip I/O and memory bandwidth requirement. Due to the properties of low cost, high speed, and low memory bandwidth requirements, the VSP provides efficient solutions for video signal processing applications.

机译：本文介绍了一种新颖的视频信号处理器（VSP），该处理器具有完整的流水线并行架构，用于多媒体系统的视频浏览，编码和图像处理。通过使用可编程数据安排和智能内存配置，可以提高开发的体系结构的效率。还介绍了减少互连和外部存储器访问的技术。配置随机存取的片上存储器模块可以解决芯片I / O和存储器带宽需求的问题。由于具有低成本，高速和低内存带宽的特性，VSP为视频信号处理应用提供了有效的解决方案。

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来源
《IEEE Transactions on Consumer Electronics》 |1996年第3期|P.526-534|共9页
作者
Yeong-Kang Lai; Liang-Gee Chen;
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正文语种 eng
中图分类无线电电子学、电信技术;
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1. A novel MPEG-2 audio decoder with efficient data arrangement and memory configuration [J] . Tsung-Han Tsai, Liang-Gee Chen IEEE Transactions on Consumer Electronics . 1997,第3期

机译：新型MPEG-2音频解码器，具有高效的数据排列和存储配置
2. Programmable general purpose data path suitable for video signal processors [J] . Evans S., Yates R. Electronics Letters . 1993,第22期

机译：适用于视频信号处理器的可编程通用数据路径
3. Memory management for dataflow programming of multirate signal processing algorithms [J] . Bhattacharyya S.S., Lee E.A. IEEE Transactions on Signal Processing . 1994,第5期

机译：用于多速率信号处理算法的数据流编程的内存管理
4. A Novel Video Signal Processor with Programmable Data Arrangement and Efficient Memory Configuration [C] . Yeong-Kang Lai, Liang-Gee Chen, Institute of Electric and Electronic Engineer International Conference on Consumer Electronics . 1996

机译：一种具有可编程数据布置和高效内存配置的新型视频信号处理器
5. Improved framework for fast and efficient memory-based frame data reconfiguration for multi-row spanning designs on field programmable gate arrays. [D] . Sreeram, Rohan. 2010

机译：用于现场可编程门阵列上多行跨越设计的快速有效的基于存储器的帧数据重新配置的改进框架。
6. Sentinel plants as programmable processing units: insights from a multidisciplinary perspective about stress memory and plant signaling and their relevance at community level [O] . Rafael V. Ribeiro, Ricardo da Silva Torres 2018

机译：前哨植物作为可编程处理单元：从多学科角度对胁迫记忆和植物信号及其在社区一级的相关性的见解
7. Memory Management for Dataflow Programming of Multirate Signal Processing Algorithms [O] . Shuvra S. Bhattacharyya, Edward A. Lee 1994

机译：多速率信号处理算法数据流编程的存储器管理

A novel video signal processor with programmable data arrangement and efficient memory configuration

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