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首页> 外文期刊>Circuits and Systems >Chip Design of a Low-Voltage Wideband Continuous-Time Sigma-Delta Modulator with DWA Technology for WiMAX Applications
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Chip Design of a Low-Voltage Wideband Continuous-Time Sigma-Delta Modulator with DWA Technology for WiMAX Applications

机译：具有DWA技术的WiMAX应用低压连续宽带Sigma-Delta调制器的芯片设计

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This paper presents the design and experimental results of a continuous-time (CT) sigma-delta (ΣΔ) modulator with data-weighted average (DWA) technology for WiMAX applications. The proposed modulator comprises a third-order active RC loop filter, internal quantizer operating at 160 MHz and three DAC circuits. A multi-bit quantizer is used to increase resolution and multi-bit non-return-to-zero (NRZ) DACs are adopted to reduce clock jitter sensitivity. The NRZ DAC circuits with quantizer excess loop delay compensation are set to be half the sampling period of the quantizer for increasing modulator stability. A dynamic element matching (DEM) technique is applied to multi-bit ΣΔ modulators to improve the nonlinearity of the internal DAC. This approach translates the harmonic distortion components of a nonideal DAC in the feedback loop of a ΣΔ modulator to high-frequency components. Capacitor tuning is utilized to overcome loop coefficient shifts due to process variations. The DWA technique is used for reducing DAC noise due to component mismatches. The prototype is implemented in TSMC 0.18 um CMOS process. Experimental results show that the ΣΔ modulator achieves 54-dB dynamic range, 51-dB SNR, and 48-dB SNDR over a 10-MHz signal bandwidth with an oversampling ratio (OSR) of 8, while dissipating 19.8 mW from a 1.2-V supply. Including pads, the chip area is 1.156 mm2.
机译：本文介绍了采用WiMAX应用的数据加权平均（DWA）技术的连续时间（CT）Σ-Δ（ΣΔ）调制器的设计和实验结果。拟议的调制器包括一个三阶有源RC环路滤波器，以160 MHz工作的内部量化器和三个DAC电路。多位量化器用于提高分辨率，而多位不归零（NRZ）DAC用于降低时钟抖动灵敏度。带有量化器过量环路延迟补偿的NRZ DAC电路被设置为量化器采样周期的一半，以提高调制器的稳定性。动态元素匹配（DEM）技术应用于多位ΣΔ调制器，以改善内部DAC的非线性。这种方法将ΣΔ调制器反馈环路中非理想DAC的谐波失真分量转换为高频分量。利用电容器调整来克服由于工艺变化引起的环路系数偏移。 DWA技术用于降低由于组件失配而产生的DAC噪声。该原型在台积电0.18 um CMOS工艺中实现。实验结果表明，ΣΔ调制器在10MHz信号带宽上具有54dB的动态范围，51dB的SNR和48dB的SNDR，过采样比（OSR）为8，而在1.2V的电压下耗散19.8mW供应。包括焊盘在内，芯片面积为1.156 mm2。

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