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Formal ESL Synthesis for Control-Intensive Applications

机译：用于控制密集型应用的正式ESL综合

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摘要

Due to the massive complexity of contemporary embedded applications and integrated systems, long effort has been invested in high-level synthesis (HLS) and electronic system level (ESL) methodologies to automatically produce correct implementations from high-level, abstract, and executable specifications written in program code. If the HLS transformations that are applied on the source code are formal, then the generated implementation is correct-by-construction. The focus in this work is on application-specific design, which can deliver optimal, and customized implementations, as opposed to platform or IP-based design, which is bound by the limits and constraints of the preexisting architecture. This work surveys and reviews past and current research in the area of ESL and HLS. Then, a prototype HLS compiler tool that has been developed by the author is presented, which utilizes compiler-generators and logic programming to turn the synthesis into a formal process. The scheduler PARCS and the formal compilation of the system are tested with a number of benchmarks and real-world applications. This demonstrates the usability and applicability of the presented method.
机译：由于当代嵌入式应用程序和集成系统的高度复杂性，人们已经在高级综合（HLS）和电子系统级（ESL）方法上进行了长期的投入，以根据编写的高级，抽象和可执行规范自动生成正确的实现。在程序代码中。如果应用于源代码的HLS转换是形式化的，则生成的实现是逐个构造正确的。这项工作的重点是特定于应用程序的设计，与基于平台或IP的设计相反，该设计可以提供最佳的定制化实现，而平台或基于IP的设计受现有架构的限制和约束所约束。这项工作对ESL和HLS领域的过去和当前研究进行了调查和回顾。然后，介绍了作者开发的原型HLS编译器工具，该工具利用编译器生成器和逻辑编程将综合转化为正式过程。调度程序PARCS和系统的正式编译已通过许多基准测试和实际应用程序进行了测试。这证明了所提出方法的可用性和适用性。

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