Impact of Crosstalk on Signal Integrity of TSVs in 3D Integrated Circuits

Shadi MS. Harb; William R. Eisenstadt

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Impact of Crosstalk on Signal Integrity of TSVs in 3D Integrated Circuits

机译：串扰对3D集成电路中TSV信号完整性的影响

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Through-Silicon-Vias (TSVs) are utilized for high density 3D integration, which induce crosstalk problems and impact signal integrity. This paper focuses on TSV crosstalk characterization in 3D integrated circuits, where several TSV physical and environmental configurations are investigated. In particular, this work shows a detailed study on the influence of signal-ground TSV locations, distances and their structural configurations on crosstalk. Embedded 3D testing circuits are also presented to evaluate the coupling effects between adjacent TSVs such as crosstalk induced delay and glitches for different crosstalk modes. Additionally, A 3D parallel Ring Oscillators testing structure is proposed to provide crosstalk strength coupling indicator between adjacent TSVs. Simulation results are conducted using a 3D electromagnetic field solver (HFSS) from Ansoft Corporation and a Spice-like simulator (ADS) from Keysight Technologies Corporation based on MIT 0.15μm 3DFDSOI process technology.

机译：硅通孔（TSV）用于高密度3D集成，这会引起串扰问题并影响信号完整性。本文重点研究3D集成电路中的TSV串扰特性，其中研究了几种TSV物理和环境配置。特别是，这项工作显示了对信号接地TSV位置，距离及其结构配置对串扰的影响的详细研究。还提出了嵌入式3D测试电路，以评估相邻TSV之间的耦合效应，例如串扰引起的延迟和针对不同串扰模式的毛刺。另外，提出了一种3D并联环形振荡器测试结构，以提供相邻TSV之间的串扰强度耦合指示器。基于MIT0.15μm3DFDSOI工艺技术，使用Ansoft Corporation的3D电磁场求解器（HFSS）和Keysight Technologies Corporation的Spice-like仿真器（ADS）进行了仿真结果。

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《Advances in Science, Technology and Engineering Systems》 |2018年第1期|共6页
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Shadi MS. Harb; William R. Eisenstadt;
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3. Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures [J] . Y. Yang, R. Labie, F. Ling, Microelectronics & Reliability . 2010,第9a11期

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7. Reducing signal coupling and crosstalk in monolithic, mixed-signal integrated circuits [O] . Clewell Matthew John 100

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Impact of Crosstalk on Signal Integrity of TSVs in 3D Integrated Circuits

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