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首页> 外文期刊>EURASIP journal on advances in signal processing >Experiment Design Regularization-Based Hardware/Software Codesign for Real-Time Enhanced Imaging in Uncertain Remote Sensing Environment
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Experiment Design Regularization-Based Hardware/Software Codesign for Real-Time Enhanced Imaging in Uncertain Remote Sensing Environment

机译：在不确定的遥感环境中基于实验设计基于规范化的实时增强成像的软硬件协同设计

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摘要

A new aggregated Hardware/Software (HW/SW) codesign approach to optimization of the digital signal processing techniques for enhanced imaging with real-world uncertain remote sensing (RS) data based on the concept of descriptive experiment design regularization (DEDR) is addressed. We consider the applications of the developed approach to typical single-look synthetic aperture radar (SAR) imaging systems operating in the real-world uncertain RS scenarios. The software design is aimed at the algorithmic-level decrease of the computational load of the large-scale SAR image enhancement tasks. The innovative algorithmic idea is to incorporate into the DEDR-optimized fixed-point iterative reconstruction/enhancement procedure the convex convergence enforcement regularization via constructing the proper multilevel projections onto convex sets (POCS) in the solution domain. The hardware design is performed via systolic array computing based on a Xilinx Field Programmable Gate Array (FPGA) XC4VSX35-10ff668 and is aimed at implementing the unified DEDR-POCS image enhancement/reconstruction procedures in a computationally efficient multi-level parallel fashion that meets the (near) real-time image processing requirements. Finally, we comment on the simulation results indicative of the significantly increased performance efficiency both in resolution enhancement and in computational complexity reduction metrics gained with the proposed aggregated HW/SW co-design approach.
机译：提出了一种新的硬件/软件（HW / SW）编码合集方法，该方法基于描述性实验设计正则化（DEDR）的概念，优化了数字信号处理技术，以增强现实世界中的不确定遥感（RS）数据的成像效果。我们考虑将开发的方法应用于在现实世界中不确定的RS场景中运行的典型单视场合成孔径雷达（SAR）成像系统。该软件设计旨在降低大规模SAR图像增强任务的计算量在算法级别上。创新的算法思想是通过在解决方案域中将适当的多级投影构造到凸集（POCS）上，将凸收敛实施正则化纳入DEDR优化的定点迭代重建/增强过程中。硬件设计是通过基于Xilinx现场可编程门阵列（FPGA）XC4VSX35-10ff668的脉动阵列计算执行的，旨在以计算有效的多级并行方式实现统一的DEDR-POCS图像增强/重建程序，从而满足（近）实时图像处理要求。最后，我们对模拟结果进行评论，该结果表明通过建议的硬件/软件协同设计方法获得的分辨率增强和计算复杂度降低指标均显着提高了性能效率。

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