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首页> 外文期刊>EURASIP journal on embedded systems >Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices
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Dynamic partial reconfigurable hardware architecture for principal component analysis on mobile and embedded devices

机译：动态部分可重配置的硬件体系结构，用于在移动和嵌入式设备上进行主成分分析

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摘要

With the advancement of mobile and embedded devices, many applications such as data mining have found their way into these devices. These devices consist of various design constraints including stringent area and power limitations, high speed-performance, reduced cost, and time-to-market requirements. Also, applications running on mobile devices are becoming more complex requiring significant processing power. Our previous analysis illustrated that FPGA-based dynamic reconfigurable systems are currently the best avenue to overcome these challenges. In this research work, we introduce efficient reconfigurable hardware architecture for principal component analysis (PCA), a widely used dimensionality reduction technique in data mining. For mobile applications such as signature verification and handwritten analysis, PCA is applied initially to reduce the dimensionality of the data, followed by similarity measure. Experiments are performed, using a handwritten analysis application together with a benchmark dataset, to evaluate and illustrate the feasibility, efficiency, and flexibility of reconfigurable hardware for data mining applications. Our hardware designs are generic, parameterized, and scalable. Furthermore, our partial and dynamic reconfigurable hardware design achieved 79 times speedup compared to its software counterpart, and 71% space saving compared to its static reconfigurable hardware design.
机译：随着移动和嵌入式设备的发展，诸如数据挖掘之类的许多应用已进入这些设备。这些设备包括各种设计约束，包括严格的面积和功率限制，高速性能，降低的成本以及上市时间要求。而且，在移动设备上运行的应用程序变得越来越复杂，需要大量的处理能力。我们之前的分析表明，基于FPGA的动态可重配置系统目前是克服这些挑战的最佳途径。在这项研究工作中，我们为主成分分析（PCA）介绍了一种有效的可重配置硬件体系结构，这是数据挖掘中广泛使用的降维技术。对于诸如签名验证和手写分析之类的移动应用程序，最初会应用PCA来减少数据的维数，然后再进行相似性度量。使用手写分析应用程序和基准数据集进行实验，以评估和说明用于数据挖掘应用程序的可重新配置硬件的可行性，效率和灵活性。我们的硬件设计是通用的，参数化的和可扩展的。此外，与软件同类产品相比，我们的部分和动态可重配置硬件设计实现了79倍的加速，与静态可重配置硬件设计相比，节省了71％的空间。

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