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首页> 外文期刊>Malaysian Journal of Computer Science >Cache Replacement for Multi-Threaded Applications Using Context Based Data Pattern Exploitation Technique
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Cache Replacement for Multi-Threaded Applications Using Context Based Data Pattern Exploitation Technique

机译：使用基于上下文的数据模式开发技术替换多线程应用程序的缓存

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The impact of various cache replacement policies act as the main deciding factor of system performance and efficiency in Chip Multi-Core Processors (CMP). Many existing cache replacement polices such as the Least Recently Used (LRU), Most Recently Used (MRU), Not Recently Used (NRU) etc. have proved to work well in the shared L2 cache for most of the data set patterns generated by current applications. But when it comes to parallel multi-threaded applications which generate differing patterns of workload at different intervals, the above specified schemes might prove sub-optimal as they generally do not abide by the spatial and temporal locality theories. This paper proposes a novel cache replacement policy that is targeted towards such applications. Context Based Data Pattern Exploitation Technique (CB-DPET) assigns a counter for every block of the L2 cache. It then closely monitors the data access patterns of various threads and modifies the counter values appropriately to maximize the overall hit percentage. Experimental results obtained by using the PARSEC benchmarks have shown an average improvement of 8% to 9% in overall hits at L2 cache level when compared to the conventional LRU algorithm.
机译：各种高速缓存替换策略的影响是芯片多核处理器（CMP）中系统性能和效率的主要决定因素。对于现有的大多数数据集模式，许多现有的缓存替换策略，例如最近最少使用（LRU），最近最少使用（MRU），最近最少使用（NRU）等，都已证明在共享L2缓存中可以很好地工作。应用程序。但是，当涉及到在不同时间间隔生成不同工作负载模式的并行多线程应用程序时，上述指定的方案可能会证明是次优的，因为它们通常不遵守空间和时间局部性理论。本文提出了针对此类应用的新颖的缓存替换策略。基于上下文的数据模式开发技术（CB-DPET）为L2高速缓存的每个块分配一个计数器。然后，它密切监视各种线程的数据访问模式，并适当地修改计数器值，以使总命中百分比最大化。通过使用PARSEC基准测试获得的实验结果表明，与常规LRU算法相比，二级缓存级别的总体命中率平均提高了8％至9％。

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