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Design techniques for low-voltage analog integrated circuits

机译:低压模拟集成电路的设计技术

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In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.
机译:在本文中,对(超)低压集成电路(IC)的不同设计技术进行了回顾和分析。该分析表明,在标准CMOS工艺中用于低压模拟IC设计的最合适的设计方法包括使用体驱动MOS晶体管,动态阈值MOS晶体管和在弱或中等反转区域工作的MOS晶体管的技术。这种技术的主要优点是不需要对标准CMOS结构或工艺进行任何修改。使用这些方法设计的基本电路构建块(如差分放大器或电流镜)能够在600 mV(甚至更低)的电源电压下工作,这是现代便携式应用集成系统的关键特性。

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