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首页> 外文期刊>Journal of Engineering >A Very Compact AES-SPIHT Selective Encryption Computer Architecture Design with Improved S-Box
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A Very Compact AES-SPIHT Selective Encryption Computer Architecture Design with Improved S-Box

机译：具有改进的S-Box的非常紧凑的AES-SPIHT选择性加密计算机体系结构设计

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The “S-box” algorithm is a key component in the Advanced Encryption Standard (AES) due to its nonlinear property. Various implementation approaches have been researched and discussed meeting stringent application goals (such as low power, high throughput, low area), but the ultimate goal for many researchers is to find a compact and small hardware footprint for the S-box circuit. In this paper, we present our version of minimized S-box with two separate proposals and improvements in the overall gate count. The compact S-box is adopted with a compact and optimum processor architecture specifically tailored for the AES, namely, the compact instruction set architecture (CISA). To further justify and strengthen the purpose of the compact crypto-processor’s application, we have also presented a selective encryption architecture (SEA) which incorporates the CISA as a part of the encryption core, accompanied by the set partitioning in hierarchical trees (SPIHT) algorithm as a complete selective encryption system.
机译：由于其非线性特性，“ S-box”算法是高级加密标准（AES）中的关键组件。为了满足严格的应用目标（例如低功耗，高吞吐量，低面积），已经研究和讨论了各种实现方法，但是许多研究人员的最终目标是为S-box电路找到紧凑，小巧的硬件尺寸。在本文中，我们介绍了最小化S形盒的版本，其中包含两个单独的建议，并改进了总体门数。紧凑型S-box采用了专为AES量身定制的紧凑，最佳处理器架构，即紧凑指令集架构（CISA）。为了进一步证明并加强紧凑型密码处理器的应用目的，我们还提出了一种选择性加密体系结构（SEA），该体系结构将CISA作为加密核心的一部分，并结合了分层树中的集合划分（SPIHT）算法作为完整的选择性加密系统。

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