—This paper present new energy efficient methodsof designing switches and routing interconnects insideFPGA using novel variants of Dynamic Threshold MOS(DTMOS) instead of traditional NMOS pass transistorbased switches and interconnects. The extra neededtransistors can be easily shared, in multiplexer basedrouting architecture of FPGA, keeping area overhead to beminimum. Extensive transistor level HSPICE simulationbased on Berkeley Predictive Technology Model (BPTM)for 65nm device at operating frequency of 300MHz showsan average 23.35% improvement in power delay product(PDP) of simple switch (NMOS pass transistor) and anaverage 32.83% improvement in the PDP of Virtex-II FPGArouting interconnects over conventional approaches. SinceFPGA consists of thousands of Multiplexer based routinginterconnects, hence the overall improvement in the PDP issignificant.
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