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Software/Hardware Co-Design of HMM Based Isolated Digit Recognition System

机译:基于HMM的隔离数字识别系统的软件/硬件共同设计

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—In this paper, the design and implementation results of a system on a chip (SOC) based speech recognition system as software/hardware co-design is presented. The hidden markov model (HMM) is used for the speech recognition. In order to implement this in SOC, the various tasks required are optimally partitioned between hardware and software. The SOC, housed in Altera FPGA boards , has Nios II soft core processor. Custom hardware blocks are developed for computationally intensive blocks such as Viterbi decoder. The preprocessing and training of HMM are implemented in software (using C program). The Viterbi decoding is implemented in hardware as custom block for real time recognition. It is also implemented in software for verification and comparison. It is observed that the sequential hardware implementation of viterbi block is 80 times faster than the software approach using C program with UP3 kit. An over all recognition accuracy of 94.8% is achieved for speaker independent digit recognition for our own database of 6 speakers. Altera’s DE2 board with cyclone II FPGA is used to implement TI46 digit recognition. Since the logical elements in DE2 board is high compared to UP3 kit the viterbi decoding is implemented in parallel for 0-9 digits. Because of this speed of recognition is ‘772’ times faster than software implementation with cyclone II FPGA. And also it is observed that for TI-46 speech database for f1 speaker the recognition accuracy is 87% using LPC as feature extraction technique. Extension of this work for larger vocabulary size and using MFCC as feature extraction is under progress.
机译:- 本文介绍了作为软件/硬件共同设计的基于芯片(SoC)语音识别系统的系统的设计和实现结果。隐藏的马尔可夫模型(HMM)用于语音识别。为了在SOC中实现这一点,所需的各种任务是在硬件和软件之间最佳地分区。位于Altera FPGA板的SOC,拥有Nios II软核心处理器。为计算密集型块(如Viterbi解码器)开发了自定义硬件块。 HMM的预处理和培训是在软件中实现的(使用C程序)。 Viterbi解码以硬件作为自定义块实现,以便实时识别。它还在软件中实施以进行验证和比较。观察到,Viterbi块的顺序硬件实现比使用UP3套件的C程序的软件方法快80倍。对于我们自己的6个发言者数据库的扬声器独立的数字识别,实现了94.8%的所有识别准确性。 Altera的DE2板与Cyclone II FPGA用于实现TI46数字识别。由于DE2板中的逻辑元素与UP3套件相比高,因此Viterbi解码并行地实现0-9位。由于这种识别速度比具有Cyclone II FPGA的软件实现更快的“772”。并且还观察到,对于F1扬声器的TI-46语音数据库,使用LPC作为特征提取技术,识别精度为87%。作为更大的词汇量和使用MFCC作为特征提取的延伸,正在进行中。

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