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首页> 外文期刊>Electric Power Components and Systems >Modified Cascaded Multi-level Inverter Structure with Reduced Voltage Stress Across H-Bridge for High Voltage Application
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Modified Cascaded Multi-level Inverter Structure with Reduced Voltage Stress Across H-Bridge for High Voltage Application

机译:改进的跨级多电平逆变器结构,其跨H桥的电压应力降低,适用于高压应用

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摘要

This paper presents a modified cascaded multi-level structure for high voltage application. The topology proposed optimizes switch count per voltage level along with the reduction in voltage stress across the switches. Optimization based on different criteria has been discussed and a comparison of the proposed structure with existing topology has been carried out. This paper also shows a level shift PWM control scheme and a closed loop multi-band hysteresis control scheme. The topology is simulated for the above two control schemes on MATLAB and also verified experimentally for single phase seven-level inverter. The experimental verification was done with DSP F28337D TI Launchpad on series resistance and inductance (RL) load.
机译:本文提出了一种用于高压应用的改进的级联多电平结构。提出的拓扑优化了每个电压电平的开关数量,并降低了开关两端的电压应力。讨论了基于不同标准的优化,并已将所提出的结构与现有拓扑进行了比较。本文还展示了一个电平移位PWM控制方案和一个闭环多频带磁滞控制方案。在MATLAB上针对以上两种控制方案对拓扑进行了仿真,并针对单相七电平逆变器进行了实验验证。使用DSP F28337D TI Launchpad在串联电阻和电感(RL)负载上进行了实验验证。

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