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首页> 外文期刊>Electric power systems research >Enhanced structure of second-order generalized integrator frequency-locked loop suitable for DC-offset rejection in single-phase systems
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Enhanced structure of second-order generalized integrator frequency-locked loop suitable for DC-offset rejection in single-phase systems

机译：适用于单相系统中直流偏移抑制的二阶广义积分器锁频环的增强结构

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摘要

For the proper operation of a microgrid, an accurate estimation of the grid parameters such as phase angle, operating frequency and amplitude under various disturbances is of prime interest. In this paper, an enhanced second-order generalized integrator-based frequency-locked loop (ESOGI-FLL) intended for DC-offset rejection in both grid-connected and islanded operation of a single-phase voltage source inverter (VSI) is presented. The main contribution in this work is the ability of the proposed scheme to remove the overall uninspected distortion in the orthogonal component and oscillations that affect the estimated frequency and phase caused mainly by the inherent DC-offset in the input voltage. Unlike the most popular PLLs dealing with DC-offset rejection, the proposed scheme has a great advantage in term of structure complexity and computational time. Numerical simulations as well as practical assessments are carried out to highlight the effectiveness and robustness of the proposed scheme in term of parameters estimation of highly shifted input voltage. In addition, the proposed scheme is tested against corrupted input voltage such as frequency change, phase jump and voltage sags. The paper also reports a detailed comparative study with conventional SOGI-FLL and third-order generalized integrator based FLL. The obtained results have shown best performances of the proposed ESOGI-FLL in term of DC-offset rejection in the orthogonal component, ripples elimination in the estimated frequency and less computational time.
机译：为了使微电网正常运行，在各种干扰下准确估算电网参数（例如相角，工作频率和振幅）至关重要。本文提出了一种增强的基于二阶通用积分器的锁频环（ESOGI-FLL），旨在在单相电压源逆变器（VSI）的并网运行和孤岛运行中实现直流偏移抑制。这项工作的主要贡献在于，所提出的方案能够消除正交分量中的所有未经检查的失真和影响主要由输入电压中固有的直流偏移引起的影响估计频率和相位的振荡的能力。与处理DC偏移抑制的最流行的PLL不同，该方案在结构复杂度和计算时间方面具有很大优势。进行了数值模拟和实际评估，以突出提出的方案在高位移输入电压的参数估计方面的有效性和鲁棒性。另外，针对诸如频率变化，相位跳变和电压骤降之类的损坏的输入电压测试了所提出的方案。本文还报告了与常规SOGI-FLL和基于FLL的三阶广义积分器的详细比较研究。从正交分量的直流偏移抑制，估计频率的纹波消除和较少的计算时间等方面，所获得的结果表明了所提出的ESOGI-FLL的最佳性能。

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