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Synopsys development system reduces development time from months to weeks

机译:Synopsys开发系统将开发时间从数月缩短至数周

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摘要

The Embedded Vision Development System accelerates the design of embedded vision processors using its Processor Designer tool set and HAPS FPGA-based prototyping system. It allows designers to explore and tune processor architectures for the optimal combination of power and speed, and implement the design on a HAPS FPGA-based prototype. The system includes pre-verified design examples to help designers implement an ASIP optimized to meet their SoC objectives. It provides a ready-to-use, modifiable base processor including a full C/C++ compiler, which supports all functions provided by the OpenCV library. The execution of the compiled code with the automatically generated instruction-set simulator (ISS) is easy to profile, identifying performance-intensive parts of the application, which can be accelerated by changes in the processor architecture. Processor Designer generates optimized RTL of the ASIP, which can be downloaded into a HAPS FPGA-based prototyping system. The Embedded Vision Development System is available now.
机译:嵌入式视觉开发系统使用其Processor Designer工具集和基于HAPS FPGA的原型设计系统,加快了嵌入式视觉处理器的设计。它使设计人员能够探索和调整处理器架构,以实现功率和速度的最佳组合,并在基于HAPS FPGA的原型上实施设计。该系统包括预先验证的设计示例,以帮助设计人员实施经过优化的ASIP,以满足其SoC目标。它提供了一个现成的,可修改的基本处理器,其中包括一个完整的C / C ++编译器,它支持OpenCV库提供的所有功能。使用自动生成的指令集模拟器(ISS)对编译后的代码的执行很容易进行分析,从而确定了应用程序中性能密集的部分,可以通过更改处理器体系结构来加速执行。 Processor Designer生成ASIP的优化RTL,可以将其下载到基于HAPS FPGA的原型系统中。嵌入式视觉开发系统现已上市。

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  • 来源
    《Electrical Design News》 |2013年第6期|63-63|共1页
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  • 收录信息 美国《科学引文索引》(SCI);
  • 原文格式 PDF
  • 正文语种 eng
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