...
首页> 外文期刊>Electronics Letters >Low-loss on-chip transmission lines with micro-patterned artificial dielectric shields
【24h】

Low-loss on-chip transmission lines with micro-patterned artificial dielectric shields

机译:具有微图案人工介电屏蔽的低损耗片上传输线

获取原文
获取原文并翻译 | 示例
           

摘要

Low-loss coplanar waveguide (CPW) transmission lines integrated on a standard (5 -10 Omega ldr cm) silicon substrate are realised by using an artificial dielectric shield with a very high in-plane dielectric constant. The shield consists of a 30 nm-thick Al2O3 film sandwiched by two 100 nm-thick aluminium layers patterned into lattices of mum-size elements. The individual metallic elements are micro-patterned to suppress the flow of eddy currents at microwave frequencies. Inserted below the CPW, the shield blocks the electric field of the line from entering the silicon substrate. The resulting line attenuation (measured up to 25 GHz) is comparable to that of identical CPWs built on a high-resistivity silicon wafer.
机译:通过使用具有非常高的面内介电常数的人造介质屏蔽层,可以将集成在标准(5 -10Ωldr cm)硅基板上的低损耗共面波导(CPW)传输线实现。屏蔽层由厚度为30 nm的Al2O3膜组成,中间夹有两个100 nm厚的铝层,这些铝层被图案化为妈妈大小的元素的格子。各个金属元素都经过微细图案化,以抑制微波频率下的涡流。屏蔽层插入CPW下方,可阻止线路的电场进入硅基板。所产生的线路衰减(测量高达25 GHz)与在高电阻率硅晶圆上构建的相同CPW相当。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号