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首页> 外文期刊>Przeglad Elektrotechniczny >ASIC Design Implementation of Memory Efficient Infinite Impulse Response UWB Equalizer
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ASIC Design Implementation of Memory Efficient Infinite Impulse Response UWB Equalizer

机译：存储器高效的无限脉冲响应UWB均衡器的ASIC设计实现

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摘要

Channel Equalization plays an important role in reducing distortion and Inter-Symbol Interference (ISI) to improve the quality of transmission in Ultra-Wide Band (UWB) channel. Many equalization techniques have been proposed in the past but the proposed techniques in this paper describes Infinite Impulse Response (IIR) equalizer architecture which halves the memory requirement of conventional IIR equalizers. This is achieved by exploiting the aperiodically repeated clusters of negative-exponentially decaying segments of Channel Impulse Response (CIR) and hence by providing a single delay- line between the input and output of the equalizer. Further this architecture is realized by implementing on Application Specific Integrated Circuit (ASIC) using Mentor Graphics IC Design tools. Mathematical modeling gives suitable parameters of the IIR Filter, followed by Register Transfer Level (RTL) Design using Very High Descriptive Language (VHDL), ASIC synthesis to TSMC 0.35um process technology, physical modeling using advanced layout techniques. The IIR equalization filter is designed using 8758 Metal Oxide Semi-conductor (MOS) transistors with core cell area of 0.406mm2.%W artykule zaproponowano architekturę ekwalizera NOI, która zmniejsza wymagania pamięci przy transmisji szerokopasmowej w układach ASIC. Zaprezentowano układ w technologii 35 nm z tranzystorami MOS przy powierzchni celki jądra 0.406 mm2.
机译：信道均衡在减少失真和符号间干扰（ISI）以提高超宽带（UWB）信道的传输质量方面起着重要作用。过去已经提出了许多均衡技术，但是本文中提出的技术描述了无限脉冲响应（IIR）均衡器体系结构，该体系结构将常规IIR均衡器的存储需求减少了一半。这是通过利用信道脉冲响应（CIR）的负指数衰减段的非周期性重复群集并因此在均衡器的输入和输出之间提供一条延迟线来实现的。此外，通过使用Mentor Graphics IC设计工具在专用集成电路（ASIC）上实施，可以实现该体系结构。数学建模可提供IIR滤波器的合适参数，然后使用非常高描述性语言（VHDL）进行寄存器传输级（RTL）设计，TSMC 0.35um工艺技术的ASIC综合，使用高级布局技术的物理建模。 IIR均衡滤波器使用8758型金属氧化物半导体（MOS）晶体管设计，核心单元面积为0.406mm2。％W。 Zaprezentowano产品技术35 nm z tranzystorami MOS przy powierzchni celkijądra0.406 mm2。

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  • 来源
    《Przeglad Elektrotechniczny》 |2012年第3b期|p.223-227|共5页
  • 作者

    Muhammad Faisal SIODIQI; Muhammad Kamran BHATTI; Sana SHUJA; Shaista JABEEN; Saeed AHMAD; Adeel IQBAL; Ghufran SHAFIQ; Ahmad Naseem ALVI; Azhar YASEEN; Abid Ali MINHAS; Shahzad A. MALIK; Shahid A. KHAN; Raja AM RIAZ;

  • 作者单位

    Center for Advanced Studies in Telecommunication, COMSATS Institute of Information Technology, Islamabad,Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    National Institute of Electronics;

    Center for Advanced Studies in Telecommunication, COMSATS Institute of Information Technology, Islamabad;

    Azhar Yaseen, COMSATS Institute of Information Technology, Park Road, Chak Shehzad Campus,44000, Islamabad, Pakistan, M. Sc. M. Kamran Bhatti, National Institute of Electronics (NIE), Pakistan;

    Center for Advanced Studies in Telecommunication, COMSATS Institute of Information Technology, Islamabad,Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Center for Advanced Studies in Telecommunication, COMSATS Institute of Information Technology, Islamabad,Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Center for Advanced Studies in Telecommunication, COMSATS Institute of Information Technology, Islamabad,Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Bahria University;

    Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    Department Of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad;

    School of ECS, University of Southampton,Center for Advanced Studies in Telecommunication Studies (CAST),COMSATS Institute of Information Technology, Park Road, Chak Shehzad Campus, 44000, Islamabad, Pakistan;

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  • 正文语种 eng
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  • 关键词

    quasi-cyclic LDPC codes; protograph LDPC codes; low complexity LDPC codes; vandermonde matrix;

    机译：准循环LDPC码;原型LDPC码;低复杂度的LDPC码;范德蒙矩阵;

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