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首页> 外文期刊>Embedded Systems Letters, IEEE >All-Digital Energy-Constrained Controller for General-Purpose Accelerators and CPUs
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All-Digital Energy-Constrained Controller for General-Purpose Accelerators and CPUs

机译：全数字能量受限控制器，用于通用加速器和CPU

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摘要

Considering the energy-cap problem in battery-powered devices, dynamic voltage and frequency scaling, and power gating represent the de-facto state-of-the-art actuators. However, the limited margin available to reduce the operating voltage, the impossibility to massively integrate such actuators on-chip together with their actuation latency force a revision of such design methodologies. We present an all-digital architecture and a design methodology that can effectively manage the energy-cap problem for CPUs and accelerators. Two quality metrics are put forward to capture the performance loss and the energy budget violations. We employed a vector processor supporting four hardware threads as representative usecase. Results show an average performance loss and energy cap violations limited to 2.9% and 3.8%, respectively. Compared with solutions employing the dynamic frequency scaling actuator, our all-digital architecture improves the energy-cap violations by $3imes $ while maintaining a similar performance loss.
机译：考虑到电池供电设备中的能量盖问题，动态电压和频率缩放和功率门控代表脱磁场的最先进的执行器。然而，可用于降低工作电压的有限余量，不可能将这种致动器的致动延迟力大规模集成在芯片上的致动延迟力，这是对这种设计方法的修订。我们提出了一种全数字架构和设计方法，可以有效地管理CPU和加速器的能量帽问题。提出了两个质量指标以捕捉性能损失和违规能源预算。我们使用一个向量处理器支持四个硬件线程作为代表性useCase。结果显示平均性能损失和能源帽违规程度分别限制在2.9％和3.8％。与采用动态频率缩放执行器的解决方案相比，我们的全数字架构通过3倍倍以上的能量概要，同时保持了类似的性能损失。

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