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A Hybrid Prototyping Framework in a Virtual Platform Centered Design and Verification Flow

机译:虚拟平台的混合原型框架以中心为中心的设计和验证流程

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Future computing architectures will host increasing numbers of cores while also moving toward specialized architectures and accelerators. This development strains hardware and software design, verification, and system validation efforts. This letter introduces a virtual platform (VP) centered design flow that not only enables early software development but also considers a solution for the challenges on hardware and system level. As a core element, a hybrid prototyping framework targeting networks-on-chip (NoC) links for interfacing a VP and a field-programmable gate array provides scalability and accuracy for hardware verification and system validation.
机译:未来的计算架构将占用越来越多的核心,同时还朝着专门的架构和加速器移动。该开发应力硬件和软件设计,验证和系统验证工作。这封信介绍了一个虚拟平台(vp)中心设计流,不仅可以启用早期软件开发,而且还考虑了解决硬件和系统级别挑战的解决方案。作为核心元件,针对芯片上的混合原型框架(NOC)链路用于连接VP和现场可编程门阵列提供用于硬件验证和系统验证的可扩展性和准确性。

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