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首页> 外文期刊>IEEE Transactions on Energy Conversion >Estimation of FeSi Core Losses Under PWM or DC Bias Ripple Voltage Excitations
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Estimation of FeSi Core Losses Under PWM or DC Bias Ripple Voltage Excitations

机译：PWM或DC偏置纹波电压激励下的FeSi磁芯损耗的估算

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摘要

This work proposes a methodology to estimate core losses under pulse width modulation (PWM) or dc bias ripple voltage excitations. A special hysteresisgraph was built to measure toroidal samples under pulsed voltages. An experimental methodology, based on the principles of ferromagnetism, was implemented to investigate minor loop losses in toroidal samples of oriented and nonoriented FeSi. Triangular induction waveforms with constant dB/dt were generated. The results demonstrated that minor loops produced by PWM voltage, do not affect the major hysteresis loop losses nor the losses of other minor loops measured at different points of the major loop. In these experiments, minor loop losses under PWM voltage were very similar to minor loop losses under dc bias ripple voltage. Aspects of the behavior of minor loop losses as a function of amplitude and magnetic flux density are reported in this work.
机译：这项工作提出了一种在脉宽调制（PWM）或直流偏置纹波电压激励下估算铁芯损耗的方法。建立了一个特殊的磁滞图，以测量脉冲电压下的环形样品。实施了一种基于铁磁性原理的实验方法，以研究定向和非定向FeSi环形样品中的微小环路损耗。产生具有恒定dB / dt的三角感应波形。结果表明，由PWM电压产生的次要环路既不影响主要磁滞环路损耗，也不影响在主要环路的不同点测得的其他次要环路的损耗。在这些实验中，PWM电压下的较小环路损耗与直流偏置纹波电压下的较小环路损耗非常相似。在这项工作中，报告了较小的环路损耗行为与振幅和磁通密度的关系。

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