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Fast adaptive motion estimation algorithm and its efficient VLSI system for high definition videos

机译:快速自适应运动估计算法及其高效的高清视频VLSI系统

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Motion estimation (ME) plays an important part in the functioning of the video codec by identifying and reducing the temporal redundancies in between successive frames of a video sequence. Block matching algorithm (BMA) has been accepted as one of the finest approaches for motion estimation due to its efficiency and ease of implementation. This paper presents a new and improved iterative and adaptive search strategy for block-based motion estimation along with its efficient hardware implementation. Since it is expected that there will be more demand for streaming video services on mobile devices, designing fine tuning algorithm with dedicated efficient hardware would provide significant benefits. The present motion estimation algorithm is adaptive in nature that takes into consideration the motion content of the current frame while predicting the motion vector. The adaptive nature of the search eases the complexity of motion estimation and the algorithm makes use of the correlation present among the motion vectors of the neighboring blocks to lower the number of search position. Traditionally, such adaptive algorithms are executed by CPU cores running a software stack. Since software involves a significant amount of overheads like fetching into cache, branches, stalls etc., the efficiency of the proposed algorithm can be overshadowed by the hardware platform. To avoid this, compact hardware architecture was developed which stands ahead of other existing architectures as shown in comparison. The VLSI design for the proposed algorithm presented in this work deals with the generation of the adaptive search pattern and use of interleaved memory organization fasten the operational speed. A profitable data re-use scheme and involvement of minimum processing elements required for parallelization reduce the on-chip area. Working at a frequency of 243 MHz, the proposed design can process 66 720p HD (1280 x 720) frames in one second consuming an area of 38.2 K gate equivalent. Hence, the proposed design can be incorporated in video codecs to be used in commercial devices like camcorders, smart phones and other portable, battery-powered video consumer devices. The proposed research method achieves significantly improved results both in terms of algorithmic metrics (PSNR) as well hardware performance (speed, area). (C) 2018 Elsevier Ltd. All rights reserved.
机译:运动估计(ME)通过识别并减少视频序列连续帧之间的时间冗余,在视频编解码器的功能中起着重要作用。块匹配算法(BMA)由于其效率高且易于实现而被接受为运动估计的最佳方法之一。本文提出了一种新的,改进的迭代和自适应搜索策略,用于基于块的运动估计以及其高效的硬件实现。由于预计将对移动设备上的流视频服务有更多的需求,因此设计具有专用高效硬件的微调算法将提供显着的好处。本运动估计算法本质上是自适应的,其在预测运动矢量的同时考虑当前帧的运动内容。搜索的自适应性质减轻了运动估计的复杂性,并且该算法利用了相邻块的运动矢量之间存在的相关性来降低搜索位置的数量。传统上,此类自适应算法由运行软件堆栈的CPU内核执行。由于软件涉及大量开销,例如提取到缓存,分支,停顿等,因此所提出算法的效率可能会被硬件平台所掩盖。为避免这种情况,开发了紧凑的硬件体系结构,该体系结构领先于其他现有体系结构,如比较所示。这项工作中提出的算法的VLSI设计处理自适应搜索模式的生成,并使用交错存储组织来加快操作速度。有利可图的数据重用方案和并行化所需的最少处理元素的使用减少了片上面积。提议的设计工作在243 MHz的频率下,可以在一秒钟内处理66 720p HD(1280 x 720)帧,消耗38.2 K栅极等效面积。因此,提出的设计可以并入视频编解码器中,以用于便携式摄像机,智能电话和其他便携式电池供电的视频消费设备等商用设备。所提出的研究方法在算法指标(PSNR)和硬件性能(速度,面积)方面均取得了显着改善的结果。 (C)2018 Elsevier Ltd.保留所有权利。

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