• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>Future generation computer systems >A topology-aware load balancing algorithm for clustered hierarchical multi-core machines
【24h】

A topology-aware load balancing algorithm for clustered hierarchical multi-core machines

机译：集群分层多核计算机的拓扑感知负载均衡算法

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

In this paper, we present a topology-aware load balancing algorithm for parallel multi-core machines and its proof of asymptotic convergence to an optimal solution. The algorithm, named HwTopoLB, aims to improve the application performance by reducing core idleness and communication delays. HwTopoLB was designed taking into account the properties of current parallel systems composed of multi-core compute nodes, namely their network interconnection, and their complex and hierarchical core topology. The latter comprises multiple levels of cache, and a memory subsystem with NUMA design. These systems provide high processing power at the expense of asymmetric communication costs, which can hamper the performance of parallel applications depending on their communication patterns if ignored. Our load balancing algorithm models asymmetries in terms of latencies and bandwidths, representing the distances and communication costs among hardware components. We have implemented HwTopoLB using the Charm++ Parallel Runtime System and evaluated its performance with two different benchmarks and one application. Our experimental results with HwTopoLB exhibit scalability over clustered multi-core compute nodes, and average performance improvements of 23% over execution without load balancers and 19% over the existing load balancing strategies on different multi-core systems.
机译：在本文中，我们提出了一种用于并行多核计算机的拓扑感知的负载平衡算法，并证明了其渐近收敛性以达到最优解。该算法名为HwTopoLB，旨在通过减少核心空闲时间和通信延迟来提高应用程序性能。 HwTopoLB的设计考虑了当前由多核计算节点组成的并行系统的属性，即它们的网络互连以及它们复杂而分层的核心拓扑。后者包括多个级别的缓存，以及具有NUMA设计的内存子系统。这些系统以不对称的通信成本为代价提供了高处理能力，如果不考虑并行通信的话，这可能会妨碍并行应用程序的性能。我们的负载平衡算法在延迟和带宽方面对不对称性进行建模，表示硬件组件之间的距离和通信成本。我们已经使用Charm ++并行运行时系统实现了HwTopoLB，并使用两个不同的基准和一个应用程序对其性能进行了评估。我们在HwTopoLB上的实验结果展示了在群集多核计算节点上的可伸缩性，并且在没有负载均衡器的情况下，平均性能提高了23％，在不同多核系统上的现有负载均衡策略上，平均性能提高了19％。

著录项

  • 来源
    《Future generation computer systems》 |2014年第1期|191-201|共11页
  • 作者

    Laercio L. Pilla; Christiane P. Ribeiro; Pierre Coucheney; Francois Broquedis; Bruno Gaujal; Philippe O.A. Navaux; Jean-Francois Mehaut;

  • 作者单位

    Institute de Informdtica-Universidade Federal do Rio Grande do Sul, Avenida Bento Goncalves 9500, 91501-970, Porto Ategre, Brazil,Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

    Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

    Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

    Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

    Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

    Institute de Informdtica-Universidade Federal do Rio Grande do Sul, Avenida Bento Goncalves 9500, 91501-970, Porto Ategre, Brazil;

    Universite de Grenoble-Laboratoire d'Informatique de Grenoble-UJF-CNR5-INRIA-INP-CEA, 51 avenue Jean Kuntzmann, 38330, Montbonnot-Saint-Martin, France;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Load balancing; Hierarchical architectures; Hardware topology; Proof of optimality; Benchmarking;

    机译：负载均衡;分层架构;硬件拓扑;最优性证明;标杆管理;

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号