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The design and application of the PowerPC 405LP energy-efficient system-on-a-chip

机译：PowerPC 405LP节能片上系统的设计和应用

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摘要

The PowerPC~(~R) 405LP system-on-a-chip (SoC) processor, which was developed for high-content, battery-powered application space, provides dynamic voltage-scaling and on-the-fly frequency-scaling capabilities that allow the system and applications to adapt to changes in their performance demands and power constraints during operation. The 405LP operates over a voltage supply range of 1.95 to 0.9 V with a range of power efficiencies of 1.0 to 3.9 MIPS/mW when executing the Dhrystone benchmark. Operating system and application software support allow the applications to take full advantage of the energy-efficiency capabilities of the SoC. This paper describes the organization of the SoC design, details the capabilities provided in the design to match the performance and power consumption with the need of the application, describes how these capabilities are employed, and presents measured results for the PowerPC 405LP processor.
机译：PowerPC〜（〜R）405LP片上系统（SoC）处理器是专为高容量，电池供电的应用空间而开发的，具有动态电压调节和动态频率调节功能，可实现允许系统和应用程序在运行期间适应其性能要求和功率限制的变化。 405LP在执行Dhrystone基准测试时，在1.95至0.9 V的电源电压范围内工作，功率效率范围为1.0至3.9 MIPS / mW。操作系统和应用程序软件支持使应用程序可以充分利用SoC的节能功能。本文介绍了SoC设计的组织，详细介绍了设计中提供的功能，以使性能和功耗与应用需求相匹配，描述了如何利用这些功能，并提供了PowerPC 405LP处理器的测量结果。

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