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Probability-Based Address Translationfor Flash SSDs

机译:基于概率的地址转换为Flash SSDS

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摘要

Thanks to the advance of NAND scaling technologies, an ultra-scale SSD (e.g., > 100 TB) is introduced to markets. This rapid increase of SSD capacity, however, comes at the cost of more DRAM which resides in an SSD controller for logical-to-physical (L2P) address translation. Many have proposed various address translation algorithms to reduce DRAM, but they fail to provide short read latency, in particular when a workload has weak locality. This letter proposes a novel probability-based address translation algorithm, called ProbFTL. In contrast to existing translation techniques that maintain exact L2P mapping, ProbFTL employs a probability-based data structure, a bloom filter, for address translation. By leveraging a space-efficient nature of a bloom filter, ProbFTL reduces the amount of DRAM for address translation to 20 percent of the existing techniques. The read latency of ProbFTL is not affected from locality of a workload; ProbFTL guarantees a read amplification factor of 1.1 even under a random read workload. ProbFTL exhibits slightly worse garbage collection efficiency, but its write amplification factor is maintained sufficiently low.
机译:由于NAND缩放技术的进展,将推出超级SSD(例如,> 100 TB)。然而,SSD容量的快速增长以更多DRAM的成本,其驻留在SSD控制器中,用于逻辑到物理(L2P)地址转换。许多人提出了各种地址转换算法来减少DRAM,但它们不能提供短读取延迟,特别是当工作量具有弱局部时。这封信提出了一种新的基于概率的地址转换算法,称为probftl。与保持精确L2P映射的现有翻译技术相反,ProbftL采用基于概率的数据结构,绽放过滤器,用于地址转换。通过利用绽放过滤器的空间有效性,Probftl将DRAM的数量减少到现有技术的20%。 Probftl的读取延迟不受工作量的局部性影响;探测器即使在随机读取工作量下也可以保证读取放大因子为1.1。 Probftl表现出略差较差的垃圾收集效率,但其写入放大系数保持足够低。

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