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首页> 外文期刊>IEEE journal of selected topics in quantum electronics >First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology
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First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology

机译:基于标准SOI CMOS技术的首款近紫外和蓝光增强背面照明单光子雪崩二极管

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摘要

We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxidesemiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backside etching, comparable to DCRs of BSI SPADs fabricated on bulk wafers. Unlike bulk-wafer-based BSI SPADs, which typically suffer from poor violet and blue sensitivity, the proposed BSI SPAD features increased near-ultraviolet sensitivity as well as significant sensitivity in the violet and blue spectral ranges, thanks to the ultrathin-body SOI. To the best of our knowledge, this is the best result ever reported for any BSI SPAD in the standard CMOS technology. In addition, it also shows high sensitivity at long wavelengths thanks to the interface between silicon and silicon-dioxide layers. Therefore, it achieves a photon detection probability over 26% at 500 nm and 10% in the 400-875 nm wavelength range at 3 V excess bias voltage. The timing jitter is 119 ps full width at half maximum at the same operation condition at 637 nm wavelength. For the proposed BSI SPAD, the buried oxide layer in SOI wafers is used as an etching stop during the wafer backside-etching process, and therefore it ensures the excellent performance uniformity in large arrays.
机译:我们介绍基于标准绝缘体上硅(SOI)互补金属氧化物半导体(CMOS)技术的世界上第一个背照式(BSI)单光子雪崩二极管(SPAD)。该SPAD在背面蚀刻后可实现良好的暗计数率(DCR),与在散装晶圆上制造的BSI SPAD的DCR相当。与通常以差的紫罗兰色和蓝色灵敏度为基础的基于体晶片的BSI SPAD不同,由于超薄体SOI,建议的BSI SPAD具有增加的近紫外灵敏度以及在紫光和蓝光谱范围内的显着灵敏度的功能。据我们所知,这是标准CMOS技术中任何BSI SPAD所报告的最佳结果。此外,由于硅和二氧化硅层之间的界面,它在长波长下也显示出高灵敏度。因此,在3 V过量偏置电压下,它在500 nm处的光子检测概率超过26%,在400-875 nm波长范围内的光子检测概率达到10%。在相同的工作条件下,波长为637 nm时,时序抖动为全宽度的119 ps,最大值为一半。对于所提出的BSI SPAD,SOI晶片中的掩埋氧化物层在晶片背面蚀刻过程中用作蚀刻停止层,因此可确保在大型阵列中出色的性能均匀性。

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