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首页> 外文期刊>IEEE transactions on biomedical circuits and systems >An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors
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An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors

机译：集成的可植入刺激器，具有故障保护功能，无需片外阻塞电容器

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摘要

We present a neural stimulator chip with an output stage (electrode driving circuit) that is fail-safe under single-fault conditions without the need for off-chip blocking-capacitors. To miniaturize the stimulator output stage two novel techniques are introduced. The first technique is a new current generator circuit reducing to a single step the translation of the digital input bits into the stimulus current, thus minimizing silicon area and power consumption compared to previous works. The current generator uses voltage-controlled resistors implemented by MOS transistors in the deep triode region. The second technique is a new stimulator output stage circuit with blocking-capacitor safety protection using a high-frequency current-switching (HFCS) technique. Unlike conventional stimulator output stage circuits for implantable functional electrical stimulation (FES) systems which require blocking-capacitors in the microfarad range, our proposed approach allows capacitance reduction to the picofarad range, thus the blocking-capacitors can be integrated on-chip. The prototype four-channel neural stimulator chip was fabricated in XFAB's 1-mum silicon-on-insulator CMOS technology and can operate from a power supply between 5-18 V. The stimulus current is generated by active charging and passive discharging. We obtained recordings of action potentials and a strength-duration curve from the sciatic nerve of a frog with the stimulator chip which demonstrate the HFCS technique. The average power consumption for a typical 1-mA 20-Hz single-channel stimulation using a book electrode, is 200 muW from a 6 V power supply. The silicon area occupation is 0.38 mm2 per channel.
机译：我们提出了一种具有输出级（电极驱动电路）的神经刺激器芯片，该输出级在单故障情况下是故障安全的，而无需芯片外的阻塞电容器。为了最小化刺激器输出阶段，引入了两种新颖的技术。第一种技术是一种新的电流发生器电路，将数字输入位转换为激励电流减少到一个步骤，从而与以前的工作相比，将硅面积和功耗降至最低。电流发生器使用由深三极管区域中的MOS晶体管实现的压控电阻。第二种技术是使用高频电流开关（HFCS）技术的具有阻塞电容器安全保护功能的新型激励器输出级电路。与用于需要在微法拉范围内的阻塞电容器的可植入功能性电刺激（FES）系统的常规刺激器输出级电路不同，我们提出的方法允许将电容减小到皮法拉范围，因此可以将阻塞电容器集成在芯片上。原型四通道神经刺激器芯片采用XFAB的1微米绝缘体上硅CMOS技术制成，可以在5-18 V的电源下工作。刺激电流是通过主动充电和被动放电产生的。我们用刺激芯片从青蛙的坐骨神经获得动作电位和强度-持续时间曲线的记录，这些记录证明了HFCS技术。使用6伏电源，使用书电极进行的典型1-mA 20 Hz单通道刺激的平均功耗为200μW。每个通道的硅面积占用为0.38 mm2。

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