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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing
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Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing

机译:片上智能图像处理的时空偏置可调读出电路

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摘要

A new 96 × 96 array of 30 μm × 30 μm readout integrated circuit (ROIC) with an individual pixel tunable bias control is demonstrated. Detailed IC design, test structures, readout circuit building blocks, and applied techniques are discussed. The new ROIC is capable of providing a large voltage swing for the bias in both positive and negative polarities to each individual pixel, independently. These enhanced functionalities are achieved by modifying a capacitive transimpedance amplifier (CTIA) CMOS ROIC architecture. An FPGA-based test bench has also been developed to test and characterize the new ROIC system, for which software and hardware are described in detail. The test chip has been fabricated with 2P4M 0.35 μm high-voltage CMOS technology, where the bias voltage range is ±5 V and the output swing range is ±3.9 V. The demonstrated ROIC is an ideal infrastructure for implementation of region of interest enhancement and a solid base for infrared multispectral acquisition targeting an infrared retina.
机译:演示了具有30μm×30μm读出集成电路(ROIC)的新型96×96阵列,具有独立的像素可调偏置控制。讨论了详细的IC设计,测试结构,读出电路构造块和应用技术。新的ROIC能够独立地为每个像素的正极性和负极性提供大的电压摆幅。这些功能增强是通过修改电容互阻放大器(CTIA)CMOS ROIC体系结构来实现的。还开发了基于FPGA的测试平台来测试和表征新的ROIC系统,并详细描述了其软件和硬件。该测试芯片采用2P4M 0.35μm高压CMOS技术制造,其偏置电压范围为±5 V,输出摆幅范围为±3.9V。演示的ROIC是实现目标区域增强和增强的理想基础架构。为针对红外视网膜的红外多光谱采集的坚实基础。

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