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FPAA/Memristor Hybrid Computing Infrastructure

机译：FPAA /忆阻器混合计算基础架构

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This paper presents a circuit in which tungsten oxide -based analog memristors are post-processed on a CMOS-based Field-Programmable Analog Array Integrated Circuit (FPAA-IC). FPAAs are powerful tools for rapid analog experimentation, prototyping and power-efficient computing, and they allow custom analog circuits to be built and reconfigured. The primary motivation for this work is to introduce and demonstrate the operation of the FPAA/memristor hybrid circuit and the board-level infrastructure, and to form a basis for subsequent empirical work on analog memristive computing. The experiments shown in this paper demonstrate a successful fabrication of memristors on the FPAA substrate, and the usefulness of the hybrid computing infrastructure in terms of experimentation with memristors. The experiments suggest that a single state variable cannot capture the adaptation of a memristor. To this end, a SPICE compatible memristor model with two state variables is presented. Furthermore, a memristor-based adaptive coincidence detector is demonstrated on the FPAA/Memristor computing infrastructure.
机译：本文提出了一种电路，其中基于氧化钨的模拟忆阻器在基于CMOS的现场可编程模拟阵列集成电路（FPAA-IC）上进行后处理。 FPAA是用于快速模拟实验，原型设计和高能效计算的强大工具，它们允许构建和重新配置自定义模拟电路。这项工作的主要动机是介绍和演示FPAA /忆阻器混合电路和板级基础架构的操作，并为后续的关于忆阻计算的实证工作奠定基础。本文显示的实验证明了在FPAA基板上成功制造忆阻器以及混合计算基础设施在忆阻器实验方面的实用性。实验表明，单个状态变量无法捕获忆阻器的适应性。为此，提出了具有两个状态变量的SPICE兼容忆阻器模型。此外，在FPAA / Memristor计算基础设施上展示了基于忆阻器的自适应符合检测器。

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