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首页> 外文期刊>Circuits and Systems I: Regular Papers, IEEE Transactions on >A Low-Power and Flexible Energy Detection IR-UWB Receiver for RFID and Wireless Sensor Networks
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A Low-Power and Flexible Energy Detection IR-UWB Receiver for RFID and Wireless Sensor Networks

机译：用于RFID和无线传感器网络的低功耗，灵活的能量检测IR-UWB接收器

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摘要

This paper presents an energy detection Impulse Radio Ultra-Wideband (IR-UWB) receiver for Radio Frequency Identification (RFID) and Wireless Sensor Networks (WSN) applications. An Application-Specific Integrated Circuit (ASIC) consisting of a 3–5 GHz analog front-end, a timing circuit and a high speed baseband controller is implemented in a 90 nm standard CMOS technology. A Field-Programmable Gate Array (FPGA) is employed as a reconfigurable back-end, enabling adaptive baseband algorithms and ranging estimations. The proposed architecture is featured by high flexibility that adopts a wide range of pulse rate (512 kHz–33 MHz), processing gain (0–18 dB), correlation schemes, synchronization algorithms, and modulation schemes (PPM/OOK). The receiver prototype was fabricated and measured. The power consumption of the ASIC is 16.3 mW at 1 V power supply, which promises a minimal energy consumption of 0.5 nJ/bit. The whole link is evaluated together with a UWB RFID tag. Bit error rate (BER) measurement displays a sensitivity of $-$79 dBm at 10 Mb/s with $10^{-3} {hbox {BER}}$ achieved by the proposed receiver, corresponding to an operation distance over 10 meters under the FCC regulation.
机译：本文介绍了一种用于射频识别（RFID）和无线传感器网络（WSN）应用的能量检测脉冲无线超宽带（IR-UWB）接收器。由90 nm标准CMOS技术实现的专用集成电路（ASIC）由3–5 GHz模拟前端，定时电路和高速基带控制器组成。现场可编程门阵列（FPGA）被用作可重配置的后端，从而实现了自适应基带算法和测距估计。所提出的体系结构具有高度的灵活性，可采用广泛的脉冲率（512 kHz–33 MHz），处理增益（0–18 dB），相关方案，同步算法和调制方案（PPM / OOK）。接收器原型被制造和测量。在1 V电源下，ASIC的功耗为16.3 mW，这保证了0.5 nJ / bit的最低功耗。整个链接与UWB RFID标签一起进行评估。误码率（BER）测量显示的 $-$ 79 dBm在10 Mb / s下的灵敏度为 $ 10 ^ {-3} {hbox {BER}} $ 由建议的接收器实现，对应于FCC下超过10米的操作距离规。

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