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首页> 外文期刊>Circuits and Systems I: Regular Papers, IEEE Transactions on >Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay
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Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay

机译:具有额外环路延迟的宽带离散时间Δ-ΣADC的设计技术

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摘要

Novel implementation techniques, such as the use of direct-charge-transfer stage, noise coupling, and dynamic element matching can improve the performance of wideband $DeltaSigma$ ADCs. However, they introduce extra loop delay, which compromises the low-distortion property and even the loop stability. This paper shows how the addition of independent feedback and feed-forward branches to the loop filter can compensate the extra loop delay, and restore the desired signal and noise transfer functions. The design methodology is then generalized for different kinds of $DeltaSigma$ ADCs, and the low-distortion property is analyzed. Two wideband delta-sigma ADCs have been designed and simulated to verify the theory.
机译:新颖的实现技术,例如使用直接电荷转移级,噪声耦合和动态元素匹配,可以改善宽带 $ DeltaSigma $ ADC。但是,它们会引入额外的环路延迟,从而损害了低失真特性甚至环路稳定性。本文说明了如何在环路滤波器上增加独立的反馈和前馈分支,以补偿额外的环路延迟,并恢复所需的信号和噪声传递函数。然后,针对不同类型的ADC推广了设计方法,并分析了低失真特性。已经设计并仿真了两个宽带delta-sigma ADC来验证该理论。

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