Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

Cannizzaro S. O.; Grasso A. D.; Mita R.; Palumbo G.; Pennisi S.

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Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

机译：具有嵌套米勒补偿的三阶段CMOS OTA设计程序

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Design procedures for three-stage CMOS operational transconductance amplifiers employing nested-Miller frequency compensation are presented in this paper. After describing the basic methodology on a Class-A topology, some modifications, to increase swing, slew-rate and current drive capability, are subsequently discussed for a Class-AB solution. The approaches developed are simple as they do not introduce unnecessary circuit constraints and yield accurate results. They are hence suited for a pencil-and-paper design, but can be easily integrated into an analog knowledge-based computer-aided design tool. Experimental prototypes, designed in a 0.35-mum technology by following the proposed procedures, were fabricated and tested. Measurement results were found in close agreement with the target specifications

机译：本文介绍了采用嵌套米勒频率补偿的三级CMOS运算跨导放大器的设计程序。在描述了A类拓扑的基本方法之后，随后针对AB类解决方案讨论了一些改进措施，以增加摆幅，摆率和电流驱动能力。所开发的方法很简单，因为它们不会引入不必要的电路约束并产生准确的结果。因此，它们适用于铅笔和纸的设计，但可以轻松地集成到基于模拟知识的计算机辅助设计工具中。按照拟议的程序，以0.35微米的技术设计了实验原型，并进行了测试。发现测量结果与目标规格非常吻合

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来源
《IEEE Transactions on Circuits and Systems. I, Regular Papers》 |2007年第5期|p.933-940|共8页
作者
Cannizzaro S. O.; Grasso A. D.; Mita R.; Palumbo G.; Pennisi S.;
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原文格式 PDF
正文语种 eng
中图分类 TN71;
关键词
CAD; CMOS integrated circuits; compensation; operational amplifiers; 0.35 micron; CMOS OTA; CMOS operational transconductance amplifiers; analog knowledge-based computer-aided design tool; class-A topology; multistage amplifiers; nested-Miller compensation; CMOS; mu;

机译：CAD;CMOS集成电路;补偿;运算放大器;0.35微米;CMOS OTA;CMOS运算跨导放大器;基于模拟知识的计算机辅助设计工具;A类拓扑;多级放大器;嵌套米勒补偿;CMOS;μ;

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1. Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation [J] . Cannizzaro S. O., Grasso A. D., Mita R., IEEE transactions on circuits and systems . I , Regular papers . 2007,第5期

机译：具有嵌套米勒补偿的三阶段CMOS OTA设计程序
2. Design Procedure for Three-Stage CMOS OTAs with AC Boosting Frequency Compensation Technique [J] . Chaharmahali Iman, Asadi Shahrooz, Dousti Massoud IETE Journal of Research . 2016,第5期

机译：采用AC升压频率补偿技术的三阶段CMOS OTA设计流程
3. Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers [J] . Pugliese A., Cappuccino G., Cocorullo G. IEEE transactions on circuits and systems. II, Express briefs . 2008,第1期

机译：三级嵌套式米勒放大器的建立时间最小化设计程序
4. Well-Defined Design Procedure for a Three-Stage CMOS OTA [C] . R. Mita, G. Palumbo, S. Pennisi IEEE International Symposium on Circuits and Systems . 2005

机译：三级CMOS OTA定义的设计过程
5. Improvements in biasing, compensation and design methods of CMOS operational amplifiers. [D] . Nicolson, Sean T. 2004

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7. Indirect Compensation Techniques for Three-Stage CMOS Op-Amps [O] . Saxena Vishal, Baker R. Jacob 2009

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8. Test Procedures and Testable-Design Procedures for CMOS LSI/VLSI Circuits [R] . Reddy, S. M. 1986

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Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

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