...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>IEEE Transactions on Circuits and Systems. I, Regular Papers >Low-Power State-Parallel Relaxed Adaptive Viterbi Decoder
【24h】

Low-Power State-Parallel Relaxed Adaptive Viterbi Decoder

机译：低功耗状态并行松弛自适应维特比解码器

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Although it possesses reduced computational complexity and great power saving potential, conventional adaptive Viterbi algorithm implementations contain a global best survivor path metric search operation that prevents it from being directly implemented in a high-throughput state-parallel decoder. This limitation also incurs power and silicon area overhead. This paper presents a modified adaptive Viterbi algorithm, referred to as the relaxed adaptive Viterbi algorithm, that completely eliminates the global best survivor path metric search operation. A state-parallel decoder VLSI architecture has been developed to implement the relaxed adaptive Viterbi algorithm. Using convolutional code decoding as a test vehicle, we demonstrate that state-parallel relaxed adaptive Viterbi decoders, versus Viterbi counterparts, can achieve significant power savings and modest silicon area reduction, while maintaining almost the same decoding performance and very high throughput
机译：尽管它具有降低的计算复杂度和巨大的节能潜力，但是传统的自适应维特比算法实现包含全局最佳生存路径度量搜索操作，从而阻止了它直接在高吞吐量状态并行解码器中实现。该限制还导致功率和硅面积开销。本文提出了一种改进的自适应维特比算法，称为松弛自适应维特比算法，该算法完全消除了全局最佳幸存者路径度量搜索操作。已经开发了状态并行解码器VLSI架构来实现松弛的自适应维特比算法。使用卷积码解码作为测试工具，我们证明状态并行松弛的自适应维特比解码器与维特比同类解码器相比，可以节省大量功率并适度减少硅面积，同时保持几乎相同的解码性能和非常高的吞吐量

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号