...
  • 主题
高级搜索  >
历史搜索 清空历史
首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits
【24h】

Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits

机译：基于仿真的Posnomial性能模型的生成，用于模拟集成电路的尺寸确定

获取原文
获取原文并翻译 | 示例
           
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

This paper presents an overview of methods to automatically generate posynomial response surface models for the performance characteristics of analog integrated circuits based on numerical simulation data. The methods are capable of generating posynomial performance expressions for both linear and nonlinear circuits and circuit characteristics, at SPICE-level accuracy. This approach allows for automatic generation of an accurate sizing model for a circuit that composes a geometric program that fully describes the analog circuit sizing problem. The automatic generation avoids the time-consuming and approximate nature of handcrafted analytic model generation. The methods are based on techniques from design of experiments and response surface modeling. Attention is paid to estimating the relative "goodness-of-fit" of the generated models. Experimental results illustrate the capabilities and effectiveness of the presented methods.
机译：本文概述了基于数值模拟数据自动生成用于模拟集成电路性能特征的多项式响应面模型的方法。该方法能够以SPICE级的精度为线性和非线性电路以及电路特性生成多项式性能表达式。这种方法可以为包含几何程序的电路自动生成精确的尺寸模型，该几何程序完全描述了模拟电路的尺寸问题。自动生成避免了手工分析模型生成的耗时和近似性质。这些方法基于实验设计和响应面建模的技术。注意估计生成的模型的相对“拟合优度”。实验结果说明了所提出方法的功能和有效性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号