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Optimizing the IC delamination quality via six-sigma approach

机译:通过六西格玛方法优化IC分层质量

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摘要

Integrated circuit (IC) delamination defects occur due to a poor adhesion between wafer passivation and the assembly-molding compound. Most of the components with minor delamination are not detected during the testing process, but they have the potential to cause functional failure in the application field. Unfortunately, reworking these components is not permitted, and the IC manufacturer can incur heavy costs if the suspected defective products have to be recalled. The industry is constantly striving to improve the delamination quality. However, this task is complicated and difficult. This is mainly because of insufficient knowledge of how to effectively detect when a delamination problem occurs. The quality control plan and reliability testing methods used in current processes are simply inadequate. This paper applies the six-sigma approach to assess the entire process, reduce the occurrence of delamination, and establishes a better quality control plan for the IC assembly process. This study also identifies the contact angle in order to quantify wafer surface contamination that results in delamination. The proposed method has been implemented in a semiconductor assembly factory in Taiwan. The analytical results of this study have demonstrated the feasibility of the proposed six-sigma approach and can be used as a disciplined problem solving approach for engineers for optimizing the IC process in the future.
机译:集成电路(IC)的分层缺陷是由于晶圆钝化与装配模塑料之间的不良粘合而产生的。在测试过程中不会检测到大多数具有较小脱层的组件,但是它们有可能在应用领域引起功能故障。不幸的是,不允许对这些组件进行返工,如果必须召回可疑的有缺陷产品,IC制造商可能会承担高昂的成本。业界一直在努力提高分层质量。但是,该任务复杂且困难。这主要是由于对如何有效地检测分层问题何时发生的认识不足。当前流程中使用的质量控制计划和可靠性测试方法根本不足。本文采用六西格玛方法评估整个过程,减少分层的发生,并为IC组装过程建立更好的质量控制计划。这项研究还确定了接触角,以便量化导致分层的晶片表面污染。所建议的方法已在台湾的一家半导体组装厂中实施。这项研究的分析结果证明了所提出的六西格玛方法的可行性,并且可以用作工程师将来用于优化IC工艺的有纪律的问题解决方法。

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