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首页> 外文期刊>Magnetics, IEEE Transactions on >Straintronics-Based True Random Number Generator for High-Speed and Energy-Limited Applications
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Straintronics-Based True Random Number Generator for High-Speed and Energy-Limited Applications

机译：基于Straintronics的真随机数发生器，用于高速和能量受限的应用

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摘要

Random number generators are well known for their ubiquitous use in cryptography, statistical sampling, and computer simulations. In order to establish secure data transfers in cryptographic applications, these number generators need to reliably produce unpredictable numbers at a high rate. In this paper, by exploiting the metastability of the stressed straintronics (STR) device, we theoretically propose a proof-of-concept nanomagnetic-based scheme to generate random numbers at very high rates with low-energy overhead. The dynamic modeling of the device, including the Langevin thermal noise field, is discussed, and the effect of process variation on the energy barrier and reliability is analyzed. The device is interfaced with CMOS circuitry and simulated in the 65 nm technology. At 1 V supply level, the system can generate random numbers as fast as 510 MHz. The entire circuit, including the CMOS peripherals, consumes 12.5 uW at 100 MHz random number generation rate while dissipating merely 0.125 pJ/bit. By reducing the supply level to 0.5 V, the energy per bit can be reduced further to 19 fJ. Since the STR device can be placed on the top of the CMOS circuitry, the total area of the design is estimated to be 0.001 mm.
机译：随机数生成器因其在密码学，统计采样和计算机模拟中的普遍使用而闻名。为了在密码应用程序中建立安全的数据传输，这些数字生成器需要可靠地以高速率生成不可预测的数字。在本文中，通过利用应力应变电子器件（STR）的亚稳性，我们从理论上提出了一种基于概念验证的基于纳米磁性的方案，可以以很高的速率生成低能耗的随机数。讨论了包括Langevin热噪声场在内的器件的动态建模，并分析了工艺变化对能垒和可靠性的影响。该器件与CMOS电路接口，并采用65 nm技术进行仿真。在1 V电源电平下，系统可以生成高达510 MHz的随机数。整个电路，包括CMOS外设，在100 MHz随机数生成速率下的功耗为12.5 uW，而功耗仅为0.125 pJ / bit。通过将电源电平降低至0.5 V，每位能量可以进一步降低至19 fJ。由于STR器件可以放置在CMOS电路的顶部，因此设计的总面积估计为0.001 mm。

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