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首页> 外文期刊>IEEE Transactions on Magnetics >Reliability-Enhanced Separated Pre-Charge Sensing Amplifier for Hybrid CMOS/MTJ Logic Circuits
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Reliability-Enhanced Separated Pre-Charge Sensing Amplifier for Hybrid CMOS/MTJ Logic Circuits

机译:用于混合CMOS / MTJ逻辑电路的可靠性增强的分离式预充电感应放大器

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摘要

Benefitting from its non-volatility, low power, high speed, nearly infinite endurance, good scalability, and great CMOS compatibility, magnetic tunnel junction (MTJ) embedded in conventional CMOS logic circuits has been proposed as one potentially powerful solution to introduce non-volatility in today’s programmable logic circuits, which is envisioned to extend Moore’s law. However, a critical issue in such hybrid CMOS/MTJ logic circuit is the reliable transmission of MTJ electric signals to the CMOS electronics, i.e., the requirement of nearly zero read/write error for logic applications. In this paper, a reliability-enhanced separated pre-charge sensing amplifier (RESPCSA) is proposed for hybrid CMOS/MTJ logic circuits. By adding two feedback paths with only two transistors between its discharge and evaluation terminal, such proposed RESPCSA can achieve a more and more larger dynamic resistance difference between its two discharge branches with the MTJs during the discharge phase, thereby obtaining a large sensing margin. By using a commercial CMOS 40 nm design kit and a physics-based MTJ compact model, hybrid CMOS/MTJ transient and Monte-Carlo statistic simulations have been conducted to demonstrate its functionality and evaluate its performance, respectively.
机译:得益于其非易失性,低功耗,高速,近乎无限的耐用性,良好的可扩展性以及出色的CMOS兼容性,已建议将嵌入常规CMOS逻辑电路中的磁隧道结(MTJ)作为引入非易失性的一种潜在强大解决方案在当今的可编程逻辑电路中,可以扩展摩尔定律。然而,在这种混合CMOS / MTJ逻辑电路中的关键问题是MTJ电信号到CMOS电子器件的可靠传输,即,对于逻辑应用要求接近零的读/写误差。本文提出了一种用于混合CMOS / MTJ逻辑电路的可靠性增强的分离式预充电感测放大器(RESPCSA)。通过在放电和评估端子之间增加仅具有两个晶体管的两个反馈路径,这种建议的RESPCSA可以在放电阶段在其两个放电分支与MTJ之间实现越来越大的动态电阻差,从而获得较大的感测裕度。通过使用商用CMOS 40 nm设计套件和基于物理的MTJ紧凑模型,已经进行了混合CMOS / MTJ瞬态和蒙特卡洛统计仿真,以分别演示其功能和评估其性能。

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