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首页> 外文期刊>IEEE Transactions on Microwave Theory and Techniques >A Series-Connected-Load Doherty Power Amplifier With Push–Pull Main and Auxiliary Amplifiers for Base Station Applications
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A Series-Connected-Load Doherty Power Amplifier With Push–Pull Main and Auxiliary Amplifiers for Base Station Applications

机译：带有推挽式主放大器和辅助放大器的串联连接负载Doherty功率放大器，用于基站应用

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This article proposes a new approach for designing high-power Doherty power amplifiers (DPAs) with extended bandwidth. The analysis starts with a generic series-connected load (SCL) DPA architecture to derive equations that relate the $ABCD$ parameters of the output combiner to the transistors' optimum and load impedances. These equations make it possible to significantly increase the load impedance in the SCL DPA compared to the more popular parallel-connected load (PCL) DPA architecture-a feature of particular importance when targeting very high output power DPAs for macrocell base stations and broadcast applications. High-power PCL DPAs require very low load impedance, seriously complicating their design and limiting the achievable bandwidth of the DPA. To further maximize the load impedance increase, the proposed SCL DPA uses a push-pull topology for the main and peaking amplifier stages. A low-loss planar balanced-to-unbalanced transformer (balun)-based combiner network is then utilized to realize the DPA series-connected combiner while absorbing the transistor's parasitics. The proposed approach is applied to design a proof-of-concept 350-W SCL DPA operating over the band spanning from 720 to 980 MHz. The prototype demonstrated a peak output power of about 55 dBm over a 30% fractional bandwidth with a 6-dB back-off efficiency, measured using a pulsed signal, of between 46.6% and 54.6%. Furthermore, the modulated signal-based measurement results confirmed the linearizability of the SCL DPA prototype, while it maintained a back-off efficiency over 50% for a signal with 7.1-dB peak-to-average power ratio.
机译：本文提出了一种用于设计具有扩展带宽的大功率Doherty功率放大器（DPA）的新方法。该分析从通用串联负载（SCL）DPA架构开始，以推导将输出组合器的$ ABCD $参数与晶体管的最佳阻抗和负载阻抗相关联的方程式。与更流行的并行连接负载（PCL）DPA架构相比，这些方程式可以显着提高SCL DPA中的负载阻抗-当针对宏小区基站和广播应用的极高输出功率DPA时，这一功能尤为重要。大功率PCL DPA需要非常低的负载阻抗，这使其设计严重复杂化，并限制了DPA可实现的带宽。为了进一步最大化负载阻抗的增加，建议的SCL DPA在主放大器和峰值放大器级使用推挽式拓扑。然后利用基于低损耗平面平衡到不平衡变压器（balun）的组合器网络来实现DPA串联连接的组合器，同时吸收晶体管的寄生效应。所提出的方法适用于设计概念验证的350W SCL DPA，工作在720 MHz至980 MHz的频带上。该原型在30％的分频带宽上显示出约55 dBm的峰值输出功率，使用脉冲信号测得的6-dB回退效率介于46.6％和54.6％之间。此外，基于调制信号的测量结果证实了SCL DPA原型的线性化，同时对于7.1dB峰均功率比的信号，其退避效率保持超过50％。

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