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首页> 外文期刊>IEEE transactions on nanotechnology >Heat Dissipation in Nanocomputing: Lower Bounds From Physical Information Theory
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Heat Dissipation in Nanocomputing: Lower Bounds From Physical Information Theory

机译：纳米计算中的散热：物理信息理论的下界

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Computing circuits that irreversibly discard information unavoidably dissipate heat. Dissipative costs resulting from information loss, while insignificant in CMOS technology, may be dominant or even prohibitive in some dense, high-speed post-CMOS nanocomputing circuits that employ logically irreversible operations. In transistor-based paradigms, dissipation costs associated with logical irreversibility may be supplemented by additional unavoidable costs associated with particle supply required to maintain the computational “working substance.” These considerations motivate determination of fundamental lower bounds on the dissipative cost of computation that can be applied to concrete nanocomputing technology proposals. In this paper, we present a methodology for the determination of such bounds and illustrate its application to half-adder circuits implemented in the quantum cellular automata and nano-wire-based nano-application specific-integrated circuit paradigms. The resulting bounds reflect fundamental costs inherent in the underlying computational strategies employed by these circuits. Prospective use of this methodology as an assessment tool for post-CMOS nanocomputing technology proposals is discussed.
机译：不可逆地丢弃信息的计算电路不可避免地会散发热量。在CMOS技术中微不足道的信息损失导致的耗散成本，在采用逻辑不可逆运算的某些密集，高速后CMOS纳米计算电路中，可能占主导，甚至是禁止。在基于晶体管的范例中，与逻辑不可逆性相关的耗散成本可能会因与维持计算“工作物质”所需的粒子供应相关的额外不可避免的成本而得到补充。这些考虑因素促使确定可用于具体的纳米计算技术建议的计算耗散成本的基本下限。在本文中，我们提出了一种确定这种界限的方法，并说明了其在量子细胞自动机和基于纳米线的纳米应用特定集成电路范例中实现的半加法器电路中的应用。得出的界限反映了这些电路采用的基础计算策略固有的基本成本。讨论了该方法作为CMOS后纳米计算技术提案的评估工具的预期用途。

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