A 20-ps Time-to-Digital Converter (TDC) Implemented in Field-Programmable Gate Array (FPGA) with Automatic Temperature Correction

Pan W.; Gong G.; Li J.

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A 20-ps Time-to-Digital Converter (TDC) Implemented in Field-Programmable Gate Array (FPGA) with Automatic Temperature Correction

机译：在具有自动温度校正功能的现场可编程门阵列（FPGA）中实现的20 ps时间数字转换器（TDC）

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This paper presents an automatic temperature correction design for carry chain based time-to-digital converter (TDC) in field-programmable gate array (FPGA). The bin-by-bin calibrations under different temperatures are performed for both plain TDC and Wave Union TDC to characterize the influence of temperature variation on the delay time of carry chain. Accordingly, a simplified temperature correction scheme by using a dedicated correction channel to measure the coefficient and correct fine time result for all TDC channels is implemented and tested. This method shows only few picosecond errors for both simulation and measurement. With this correction approach, a TDC precision of 21 ps has been achieved in Cyclone II FPGA under a wide ambient temperature range from 0 $^circ{rm C}$ to 60 $^circ{rm C}$. Several design key points are also described in this paper.

机译：本文提出了一种用于现场可编程门阵列（FPGA）中基于进位链的时间数字转换器（TDC）的自动温度校正设计。对普通TDC和Wave Union TDC在不同温度下进行逐个箱校准，以表征温度变化对进位链延迟时间的影响。因此，实施并测试了通过使用专用校正通道来测量系数并校正所有TDC通道的精确时间结果的简化温度校正方案。对于仿真和测量，此方法仅显示很少的皮秒误差。通过这种校正方法，在Cyclone II FPGA中，在从0℃到60℃的宽环境温度范围内，TDC精度已达到21 ps。本文还介绍了几个设计要点。

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来源
《Nuclear Science, IEEE Transactions on》 |2014年第3apart2期|1468-1473|共6页
作者
Pan W.; Gong G.; Li J.;
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作者单位

Key Laboratory of Particle & Radiation Imaging, Department of Engineering Physics, Tsinghua University, Beijing, China|c|;

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正文语种 eng
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关键词
Field-programmable gate array (FPGA); temperature correction; time-to-digital converter;

机译：现场可编程门阵列（FPGA）;温度校正;时间数字转换器;

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专利

1. On-Chip Real-Time Correction for a 20-ps Wave Union Time-To-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA) [J] . Qi J., Gong H., Liu Y. Nuclear Science, IEEE Transactions on . 2012,第4期

机译：现场可编程门阵列（FPGA）中20ps工会时间数字转换器（TDC）的片上实时校正
2. High resolution time-to-digital converter (TDC) implemented in field programmable gate array (FPGA) with compensated process voltage and temperature (PVT) variations [J] . C. Herve, J. Cerrai, T. Le Caeer Nuclear Instruments & Methods in Physics Research . 2012,第期

机译：在现场可编程门阵列（FPGA）中实现的高分辨率时间数字转换器（TDC），具有补偿的过程电压和温度（PVT）变化
3. A High-Resolution ( ${< 10}~{rm ps}$ RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array (FPGA) [J] . Bayer E., Traxler M. Nuclear Science, IEEE Transactions on . 2011,第4期

机译：高分辨率（ $ {<10}〜{rm ps} $ RMS）48通道数字时间在现场可编程门阵列（FPGA）中实现的转换器（TDC）
4. Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA) [C] . Jinyuan Wu, Zonghan Shi, Wang, . 2004

机译：现场可编程门阵列（FPGA）中仅固件的时间数字转换器（TDC）实现
5. Design and implementation of a high resolution, multi-hit time-to-digital converter (TDC) on FPGA. [D] . Amiri, Amir Mohammad. 2007

机译：在FPGA上设计和实现高分辨率，多次命中的时间数字转换器（TDC）。
6. An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction [O] . Zhipeng Song, Zhixiang Zhao, Hongsen Yu, 2020

机译：在具有实时温度校正的60 nm FPGA中实现的8.8 ps RMS分辨率时间数字转换器
7. Implementation of sub-nanosecond time-to-digital convertor in field-programmable gate array: applications to time-of-flight analysis in muon radiography [O] . Marteau J., De Bremond DArs Jean, Gibert D., 2014

机译：亚纳秒时间数字转换器在现场可编程门阵列中的实现：在μ射线照相术中的飞行时间分析中的应用
8. Firmware-Only Implementation of Time-to-Digital Converter (TDC) in Field-Programmable Gate Array (FPGA) [R] . Wu, J., Shi, Z., Wang, I. Y. 2003

机译：现场可编程门阵列（FpGa）中仅固件的时间数字转换器（TDC）实现

A 20-ps Time-to-Digital Converter (TDC) Implemented in Field-Programmable Gate Array (FPGA) with Automatic Temperature Correction

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