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首页> 外文期刊>Power Electronics, IEEE Transactions on >Design and Analysis of an Adaptively Biased Low-Dropout Regulator Using Enhanced Current Mirror Buffer
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Design and Analysis of an Adaptively Biased Low-Dropout Regulator Using Enhanced Current Mirror Buffer

机译：利用增强型电流镜缓冲器的自适应偏置低压降稳压器的设计与分析

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摘要

This paper presents an adaptively biased low-dropout regulator using an enhanced current mirror (ECM) buffer for effectively driving the gate of the PMOS power transistor. The proposed ECM buffer offers very low output impedance, which pushes out the pole at the gate of the PMOS power transistor to improve the stability. At the same time, it offers a symmetric pull-up/down slew rate to enhance the speed of the buffer, whenever the regulator is under large signal operation during the load transient. Moreover, the ECM buffer is modified to develop the regulator topology without introducing an error amplifier as a separate independent stage. It helps to minimize the overall quiescent current consumption at low-load condition and makes frequency compensation easier. Finally, the speed of the adaptive bias loop is increased by avoiding the highly capacitive gate node of the PMOS power transistor. A comprehensive small-signal analysis of the proposed regulator is also carried out for a clear understanding of the stability of each loop considering the interaction of the other loop. The regulator is implemented in a 0.18-m CMOS technology with a quiescent current of 900 nA. A maximum transient output voltage variation of 2.1% is observed with = 470 nF.
机译：本文提出了一种使用增强型电流镜（ECM）缓冲器的自适应偏置低压降稳压器，可有效驱动PMOS功率晶体管的栅极。提出的ECM缓冲器提供了非常低的输出阻抗，从而将PMOS功率晶体管栅极的极点推出，从而提高了稳定性。同时，无论何时调节器在负载瞬变期间处于大信号运行状态时，它都提供对称的上/下摆率，以提高缓冲器的速度。此外，对ECM缓冲器进行了修改，以开发调节器拓扑，而没有引入误差放大器作为单独的独立级。它有助于最小化低负载条件下的整体静态电流消耗，并使频率补偿更加容易。最后，通过避免PMOS功率晶体管的高电容栅极节点，可以提高自适应偏置环路的速度。还对拟议的调节器进行了全面的小信号分析，以清楚了解考虑其他环路相互作用的每个环路的稳定性。该稳压器采用0.18-m CMOS技术实现，静态电流为900 nA。在= 470 nF的条件下，观察到最大瞬态输出电压变化为2.1％。

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