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首页> 外文期刊>Power Electronics, IEEE Transactions on >Steady-State Analysis and Modeling of Power Factor Correctors With Appreciable Voltage Ripple in the Output-Voltage Feedback Loop to Achieve Fast Transient Response
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Steady-State Analysis and Modeling of Power Factor Correctors With Appreciable Voltage Ripple in the Output-Voltage Feedback Loop to Achieve Fast Transient Response

机译：在输出电压反馈环路中具有明显纹波的功率因数校正器的稳态分析和建模，以实现快速瞬态响应

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The classical design of an active power factor corrector (PFC) leads to slow transient response in this type of converter. This is due to the fact that the compensator placed in the output-voltage feedback loop is usually designed to have narrow bandwidth to filter the voltage ripple of twice the line frequency coming from the PFC output. This feedback loop is designed with this filtering effect because a relatively high ripple would cause considerable distortion in the reference of the line current feedback loop, and hence in the line current. However, the transient response of the PFC can be substantially improved if the bandwidth of this compensator is relatively wide, thus permitting certain distortion in the line current that leads to a tradeoff between transient response (and hence voltage ripple at the output of the compensator) and harmonic content in the line current. As a consequence of the voltage ripple at the output of the compensator (which is considered the control signal), both the static and the dynamic behaviors of the PFC change in comparison with the standard case, i.e., with no voltage ripple on the control signal. The static behavior of a PFC with appreciable voltage ripple in the output-voltage feedback loop is studied in this paper using two parameters: the amplitude of the relative voltage ripple on the control signal and its phase lag angle. The total power processed by the PFC depends on these parameters, which do not vary with the load and which determine the total harmonic distortion and the power factor at the input of the PFC. Furthermore, these parameters also determine the maximum power that can be processed by the converter while still complying with EN 61000-3-2 regulations for Class A and Class B equipment. When the converter comply with the aforementioned regulations for Class C or Class D equipment, however, the compliance does not depend on the power processed by the PFC. In the case of Class C equipment, not all the possible c-nombinations of the relative ripple of the control signal and its phase lag angle manage to comply with these regulations. Finally, the study was verified by simulation and in a real prototype.
机译：有源功率因数校正器（PFC）的经典设计导致此类转换器的瞬态响应变慢。这是由于以下事实：放置在输出电压反馈环路中的补偿器通常设计为具有窄带宽，以滤除来自PFC输出的两倍于线路频率的电压纹波。该反馈回路设计有这种滤波效果，因为相对较高的纹波会在线路电流反馈回路的参考中，从而在线路电流中引起相当大的失真。但是，如果该补偿器的带宽相对较宽，则可以大大改善PFC的瞬态响应，从而允许线电流出现某些失真，从而导致瞬态响应（以及补偿器输出的电压纹波）之间的权衡取舍。线路电流中的谐波含量。由于补偿器输出端的电压波动（被认为是控制信号），与标准情况相比，PFC的静态和动态行为都发生了变化，即控制信号上没有电压波动。本文使用两个参数研究了在输出电压反馈环路中具有明显电压纹波的PFC的静态行为：控制信号上相对电压纹波的幅度及其相位滞后角。 PFC处理的总功率取决于这些参数，这些参数不会随负载而变化，并且会确定PFC输入处的总谐波失真和功率因数。此外，这些参数还确定了转换器可以处理的最大功率，同时仍然符合A 6类设备的EN 61000-3-2规定。但是，当转换器符合上述有关C类或D类设备的规定时，该符合性并不取决于PFC处理的功率。对于C类设备，并非控制信号的相对纹波及其相位滞后角的所有可能的c组合都设法符合这些规定。最后，通过仿真和真实原型验证了该研究。

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