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首页> 外文期刊>IEEE Transactions on Reliability >Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor
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Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

机译：间歇性故障对精简指令集计算（RISC）微处理器可靠性的影响

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摘要

With the scaling of complementary metal-oxide-semiconductor (CMOS) technology to the submicron range, designers have to deal with a growing number and variety of fault types. In this way, intermittent faults are gaining importance in modern very large scale integration (VLSI) circuits. The presence of these faults is increasing due to the complexity of manufacturing processes (which produce residues and parameter variations), together with special aging mechanisms. This work presents a case study of the impact of intermittent faults on the behavior of a reduced instruction set computing (RISC) microprocessor. We have carried out an exhaustive reliability assessment by using very-high-speed-integrated-circuit hardware description language (VHDL)-based fault injection. In this way, we have been able to modify different intermittent fault parameters, to select various targets, and even, to compare the impact of intermittent faults with those induced by transient and permanent faults.
机译：随着互补金属氧化物半导体（CMOS）技术的扩展到亚微米范围，设计人员必须处理越来越多的故障类型。这样，间歇性故障在现代超大规模集成电路（VLSI）电路中变得越来越重要。由于制造过程的复杂性（会产生残留物和参数变化）以及特殊的老化机制，这些故障的出现正在增加。这项工作提出了一个间歇性故障对精简指令集计算（RISC）微处理器行为的影响的案例研究。我们已经使用基于超高速集成电路硬件描述语言（VHDL）的故障注入技术进行了详尽的可靠性评估。这样，我们便能够修改不同的间歇故障参数，选择各种目标，甚至可以比较间歇故障与瞬态和永久故障所引起的影响。

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