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首页> 外文期刊>IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control >A Novel Envelope Detector for High-Frame Rate, High-Frequency Ultrasound Imaging
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A Novel Envelope Detector for High-Frame Rate, High-Frequency Ultrasound Imaging

机译：一种用于高帧频，高频超声成像的新型包络检测器

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摘要

This paper proposes a novel design of envelope detectors capable of supporting a small animal cardiac imaging system requiring a temporal resolution of more than 150 frames per second. The proposed envelope detector adopts the quadrature demodulation and the look-up table (LUT) method to compute the magnitude of the complex baseband components of received echo signals. Because the direct use of the LUT method for a square root function is not feasible due to a large memory size, this paper presents a new LUT strategy dramatically reducing its size by using binary logarithmic number system (BLNS). Due to the nature of BLNS, the proposed design does not require an individual LOG-compression functional block. In the implementation using a field programmable gate array (FPGA), a total of 166.56 Kbytes memories were used for computing the magnitude of 16-bit in-phase and quadrature components instead of 4 Gbytes in the case of the direct use of the LUT method. The experimental results show that the proposed envelope detector is capable of generating LOG- compressed envelope data at every clock cycle after 32 clock cycle latency, and its maximum error is less than 0.5 (i.e., within the rounding error), compared with the arithmetic results of square root function and LOG compression.
机译：本文提出了一种新颖的包络检波器设计，该检波器能够支持需要每秒150帧以上的时间分辨率的小型动物心脏成像系统。提出的包络检波器采用正交解调和查找表（LUT）方法来计算接收到的回波信号的复基带分量的幅度。由于由于存储量大而无法直接将LUT方法用于平方根函数，因此本文提出了一种新的LUT策略，即通过使用二进制对数系统（BLNS）来显着减小LUT方法的大小。由于BLNS的性质，建议的设计不需要单独的LOG压缩功能块。在使用现场可编程门阵列（FPGA）的实现中，在直接使用LUT方法的情况下，总共166.56 KB的存储器用于计算16位同相和正交分量的大小，而不是4 GB 。实验结果表明，所提出的包络检波器能够在32个时钟周期的等待时间后的每个时钟周期生成LOG压缩包络数据，并且与算术结果相比，其最大误差小于0.5（即在舍入误差之内）的平方根函数和LOG压缩。

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