Design of Flat Gain LNA for 3.1-10.2GHz Band UWB Applications in 0.18μm CMOS Process

R. K. Pokharel; A. I. A. Galal; H. Kanaya; K. Yoshida

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Design of Flat Gain LNA for 3.1-10.2GHz Band UWB Applications in 0.18μm CMOS Process

机译：适用于0.18μmCMOS工艺中3.1-10.2GHz频段UWB应用的平坦增益LNA设计

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A CMOS low noise amplifier (LNA) for ultra-wideband (UWB) systems is presented. The proposed LNA achieve wide operating bandwidth for 3-10.6 GHz by using resistive shunt feedback topology. Two stage amplifiers and an inter stage circuit are designed to achieve wider gain bandwidth. The shunt resistive feedback are employed in input and output stage to provide wideband input matching with low noise figure (NF). This work is designed and fabricated in TSMC 0.18μm CMOS process. The proposed UWB LNA achieves a measured gain 9 dB and has a noise figure less than 3.5 dB over entire band while consuming 21.5 mW of power.

机译：提出了一种用于超宽带（UWB）系统的CMOS低噪声放大器（LNA）。所提出的LNA通过使用电阻分流反馈拓扑在3-10.6 GHz范围内实现了宽工作带宽。设计两级放大器和一个级间电路以实现更宽的增益带宽。在输入和输出级采用分流电阻反馈，以提供具有低噪声系数（NF）的宽带输入匹配。这项工作是采用台积电0.18μmCMOS工艺设计和制造的。拟议的UWB LNA可实现9 dB的测量增益，并且在整个频带上的噪声系数均小于3.5 dB，同时消耗21.5 mW的功率。

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来源
《電子情報通信学会技術研究報告》 |2008年第195期|p.25-29|共5页
作者
R. K. Pokharel; A. I. A. Galal; H. Kanaya; K. Yoshida;
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作者单位

Graduate School of Information Science and Electrical Engineering, Kyushu University 744 Motooka, Nishi-ku, Fukuoka, 819-0395 Japan;

Graduate School of Information Science and Electrical Engineering, Kyushu University 744 Motooka, Nishi-ku, Fukuoka, 819-0395 Japan;

Graduate School of Information Science and Electrical Engineering, Kyushu University 744 Motooka, Nishi-ku, Fukuoka, 819-0395 Japan;

Graduate School of Information Science and Electrical Engineering, Kyushu University 744 Motooka, Nishi-ku, Fukuoka, 819-0395 Japan;

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原文格式 PDF
正文语种 jpn
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关键词
flat gain; LNA; RF integrated circuits; UWB systems; 0.18μm CMOS process;

机译：固定收益;LNA;射频集成电路;超宽带系统;0.18μmCMOS工艺;

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专利

1. Design of Flat Gain LNA for 3.1-10.2GHz Band UWB Applications in 0.18μm CMOS Process [J] . R. K. Pokharel, A. I. A. Galal, H. Kanaya, 電子情報通信学会技術研究報告. マイクロ波. Microwaves . 2008,第195期

机译：适用于0.18μmCMOS工艺中3.1-10.2GHz频段UWB应用的平坦增益LNA设计
2. Design of UWB switched gain controlled LNA using 0.18 μm CMOS [J] . M.I. Jeong, J.N. Lee, C.S. Lee Electronics Letters . 2008,第7期

机译：使用0.18μmCMOS的UWB开关增益控制LNA设计
3. A low power and high gain CMOS LNA for UWB applications in 90 nm CMOS process [J] . Pandey Sunil, Singh Jawar Microelectronics journal . 2015,第5期

机译：适用于90 nm CMOS工艺中UWB应用的低功耗高增益CMOS LNA
4. A high stability and excellent gain flatness 3–5 GHz 0.18μm CMOS low noise amplifier for ultra-wide-band applications [C] . Bhale V.P., Dalal U.D., Patrikar R.M. International Conference on Devices, Circuits and Systems . 2014

机译：高稳定性和出色的增益平坦度3–5 GHz0.18μmCMOS低噪声放大器，用于超宽带应用
5. Designs of broadband highly linear CMOS LNAs for multiradio multimode applications. [D] . Chen, Wei-Hung. 2009

机译：用于多无线电多模应用的宽带高度线性CMOS LNA设计。
6. Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process [O] . Labonnah Farzana Rahman, Mamun Bin Ibne Reaz, Chia Chieu Yin, 2010

机译：0.18 µm CMOS工艺中的高速，低偏移动态锁存比较器的设计
7. A Design of Ultra Wide Band Single-to-Differential Gain Controlled Low Noise Amplifier Using 0.18 um CMOS [O] . Moo-Il Jeong, Yong-Yeol Choi, Chang-Suk Lee 2008

机译：使用0.18 um CMOS的超宽带单差动增益控制低噪声放大器的设计

Design of Flat Gain LNA for 3.1-10.2GHz Band UWB Applications in 0.18μm CMOS Process

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